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Description: 1024点8位FFT的Verilog语言实现-1024-point FFT eight Verilog language
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Size: 11264 |
Author: 郭子荣 |
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Description: 1024点8位FFT的VHDL语言实现方式,大家可以参考一下。-1024-point FFT eight VHDL way, we can take a look.
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Size: 12288 |
Author: 郭子荣 |
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Description: 2048点的fft的算法源程序,应用verilog编程实现。-2048 point fft algorithm source code, application programming Verilog.
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Size: 1575936 |
Author: 罗伟 |
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Description: Tiger sharec系列DSP的短点FFT代码(4,6,8,16点FFT),全汇编实现,将DSP的性能发挥到极致,在超高实时要求应用下有意义.-Tiger sharec Series DSP short point FFT code (4,6,8,16-point FFT), the entire compilation of the realization of the performance of the DSP to the limit, in the ultra-high real-time requirements of applications under the meaningful.
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Size: 5120 |
Author: 赵赵 |
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Description: C语言编写8个点的FFT程序,在WINTC上编译通过-C language 8 point FFT procedures WINTC compiled through
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Size: 1024 |
Author: 佐伊 |
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Description: 8点FFT算法在DSP2407上的应用,对初学FFT的人可能有点启发-8 point FFT mathmetic,apply to TI DSP2407
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Size: 4096 |
Author: 王佳 |
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Description: verilog语言实在点变换DFT源代码,可以配合软核或者其他CPU进行综合FFT变换,也可以单独使用生成module!-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
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Size: 1024 |
Author: 刘庆 |
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Description: FFT算法实现
Radix2 可以计算 4,8,16,32, 64,128, 256....点FFT
Radix4 可以计算 4,16, 64, 256, 1024...点FFT
FFT_DIT_general.c 实现了 Radix2 和Radix4 的配合使用,可以计算Radix2可以计算的所有FFT,但效率比Radix2高。-FFT can be calculated Radix2 algorithm 4,8,16,32, 64,128, 256 .... can calculate the FFT Radix4 points 4,16, 64, 256, 1024-point FFT FFT_DIT_general.c ... Radix2 and Radix4 achieved with the use of Radix2 can calculate can calculate all the FFT, but Radix2 high efficiency.
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Size: 2048 |
Author: liuxiaoxiao |
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Description: The verilog implementation of 8-point FFT in verilog. Radix 2 Decimation in Frequency.
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Size: 10240 |
Author: Hong-soo |
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Description: 8 point FFT written in Verilog
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Size: 7399424 |
Author: binh |
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Description: 该工程实现了一个64点FFT,verilog编写,采用R4SDF结构,通过Modelsim功能仿真,压缩包里有rtl代码,dc脚本,输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc script, the output report.
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Size: 1255424 |
Author: ShuChen |
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Description: FFT8,8点FFT运算,用verilog vhdl 语言编写,可以应用于64点FFT-FFT8, 8 点 FFT computation, using verilog vhdl language, can be applied to 64-point FFT
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Size: 3072 |
Author: 姚兴波 |
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Description: vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
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Size: 364544 |
Author: tejaswini |
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency
It is very good
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Size: 64512 |
Author: 小鸟动人 |
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Description: The VHDL implementation of 8-point FFT in VHDL. Radix 2 Decimation in Frequency-The VHDL implementation of 64-point FFT in VHDL. Radix 2 Decimation in Frequency
i am found of it.It s really very good!
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Size: 31744 |
Author: 小鸟动人 |
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Description: c语言编写的求1,2,4,8,16,32,64,128,256,512,1024,2048点fft 通用程序-c language of the general program requirements 1,2,4,8,16,32,64,128,256,512,1024,2048 point fft
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Size: 15360 |
Author: ws |
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Description: 基于FPGA和CORDIC算法的8点FFT-8-point FFT based on FPGA and CORDIC
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Size: 6144 |
Author: 庞清平 |
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Description: THIS THE PROGRAMME IN WHICH THE 8 POINT FFT OF THE SEQUENCE IS OBTAINED USING THE DIF FFT TECHNIQUE.-THIS IS THE PROGRAMME IN WHICH THE 8 POINT FFT OF THE SEQUENCE IS OBTAINED USING THE DIF FFT TECHNIQUE.
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Size: 9216 |
Author: Rajeshwari |
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Description: VERILOG CODE FOR FLOATING POINT 8 POINT FFT
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Size: 16083968 |
Author: gsp |
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Description: 实现功能:基8实现64点FFT处理器(进行两次8点FFT计算,采用基8进行64点)
详细说明:硬件结构包括六部分,分别为输入模块、8点FFT模块、乘法模块、顺序调整模块、输出模块和总控制模块。
其中,输入模块的主要功能是将串行输入的64个数据进行分类,分成8批次,每次8个输入到8点FFT模块中进行计算。
8点FFT模块:FFT是DFT的快速算法,当点数较大时,可以较大的减少DFT的运算量。常用的FFT算法主要有两种,分别为按时间抽选的FFT算法(DIT-FFT)和按频率抽选的FFT算法(DIF-FFT)。在我们的设计中,我们采用的是按频率抽选的8点FFT算法。
乘法模块:由于旋转因子的对称性,只需要产生8个常数因子即可。但这样会复用一些单元,从而影响运算速度,为了提高计算速度,我们分析时序情况,增加了一些单元,以实现输入数据到达之后就可以进行运算。
顺序调整模块是将第一级FFT出来的数据顺序进行调整并输出到下一级FFT模块中进行计算,数据的顺序调整情况类似于输入模块,每隔8个数取一个输出。
输出模块:由于第二级FFT模块输出数据顺序不符合实际要求,因此需要调整数据的顺序,从而使64个输出数据安装顺序串行输出,结构类似于输入模块,区别只是输入变为8个数据并行,输出为一个数据串行。-Function: base 8 implement 64-point FFT processor (twice 8:00 FFT calculation, using the base 8 of 64 points)
Description: The hardware configuration consists of six parts, namely, an input module, 8-point FFT module, multiplication module, order adjustment module, the output module and total control module.
Among them, the 64 data input module is the main function of the serial input classification, divided into eight lots, each 8 inputs and 8-point FFT module calculation.
8:00 FFT module: FFT is a fast algorithm for DFT, when a large number of points, you can greatly reduce the amount of computation of the DFT. FFT algorithm commonly used mainly two were decimated by time FFT algorithm (DIT-FFT) algorithms and FFT decimation in frequency (DIF-FFT). In our design, we have adopted is based on the frequency of lottery 8:00 FFT algorithm.
Multiplication module: Since rotational symmetry factor, you only need to generate 8 constant factor. But it will reuse some of the units, which af
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Size: 32768 |
Author: 李圣华 |
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