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Description: 增强型8051的VHDL源代码,两个周期执行一条指令,仿真工具为Modelsim,开发板为Altera的EP1C20开发板-enhanced 8051 VHDL source code, the implementation of a two-cycle instruction, simulation tools for Modelsim, development board for the Altera EP1C20 development board
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Size: 2000896 |
Author: 柳如飞 |
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Description: 8051 MCU在nois平台上的实现代码(VHDL),出自Altera公司,经过严格测试核验证-nois 8051 MCU platform in the realization of code (VHDL) from Altera Corporation, after strict verification of nuclear test
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Size: 102400 |
Author: 钟方 |
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Description: 8051 MCU在nois平台上实现的说明文档,讲解非常详细,对于设计很有帮助,出自Altera公司。-nois 8051 MCU platform in the realization of documentation to explain in great detail, useful for the design, from Altera Corporation.
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Size: 134144 |
Author: 钟方 |
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Description: The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.-The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
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Size: 1427456 |
Author: Francis Wu |
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Description: 8051_test 在nios中嵌入单片机51核-8051_test embedded microcontroller 51 in the nios core
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Size: 14745600 |
Author: 成吉 |
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Description: 北航的NIOSII教程!!第7章 Nios Ⅱ嵌入式处理器设计
7.1 Nios Ⅱ嵌入式处理器简介
7.2 Nios Ⅱ嵌入式处理器软、硬件开发流程
7.3 Nios Ⅱ嵌入式处理器系统的开发
7.4 Nios Ⅱ嵌入式处理器外围接口
7.5 HAL系统库
7.6 设计实例——电子钟
-Beihang' s NIOSII tutorial! ! Chapter 7 Nios Ⅱ embedded processor embedded processor design 7.1 Nios Ⅱ Introduction 7.2 Nios Ⅱ embedded processor hardware and software development processes 7.3 Nios Ⅱ embedded processor system development 7.4 Nios Ⅱ embedded processor Peripheral Interface 7.5 HAL System Library 7.6 Design Example- E-Clock
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Size: 2739200 |
Author: 殷桃 |
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