Search - 8086 vhdl

[assembly language] 8086

Description: vhdl 8086 core
Platform: | Size: 1227223 | Author: 姜兆刚 | Hits:

[VHDL-FPGA-Verilog] 8bit Cpu designing

Description: CPU具有的功能：能完成一些简单的指令 MOV AX,ADDRESS4 --将address4中的内容赋给AX寄存器（在8086/8088汇编语言中称这种寻址方式为直接寻址方式） ADD AX,ADDRESS4 -- 将address4中的内容加到AX寄存器中 SUB AX,ADDRESS4 -- 用address4中的内容减去AX寄存器中的内容 OUT -- 输出AX寄存器中的内容 HLT -- CPU停止运行
Platform: | Size: 103424 | Author: kinglord2006@sina.com | Hits:

[VHDL-FPGA-Verilog] cpuTerminate

Description: 用VHDL 编写的一个16位的cpu 设计方案，可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
Platform: | Size: 2108416 | Author: 宋文强 | Hits:

[VHDL-FPGA-Verilog] cpu86model

Description: 关于8086的软核fpga代码，可以直接再fpag的开发板上调试，好用而且是免费的-on the 8086 soft-core fpga code can then direct the development fpag board debugging, handy and free
Platform: | Size: 270336 | Author: 赵春生 | Hits:

[VHDL-FPGA-Verilog] designgamebasedonFPGA

Description: Run Pac-man Game Based on 8086/8088 FPGA IP Core
Platform: | Size: 432128 | Author: wangwei | Hits:

[assembly language] 8086

Description: vhdl 8086 core -vhdl 8086 core
Platform: | Size: 1226752 | Author: 姜兆刚 | Hits:

[OS program] 8086IP

Description: 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
Platform: | Size: 71680 | Author: 林丹 | Hits:

[VHDL-FPGA-Verilog] Eat_beans_on_the_8086_games

Description: 本项目在FPGA上生成8086指令兼容的软核以及外设，并在此基础上跑通pc机上古老但是仍然有趣的吃豆子PACMAN游戏，作为本科微机原理课程的实验。通过本项目，学生可以学习到8086的基本结构，在TurboC下如何进行嵌入式C语言编程，汇编语言，计算机组成等基本原理，有独立设计基于8086的SOC软硬件的能力。-The project generated in the FPGA on the 8086 Directive, as well as soft-core-compatible peripherals, and on this basis pc machine running the old pass is still fun to eat but beans PACMAN game, as a principle of undergraduate courses in computer experiments. Through the project, students learn the basic structure of 8086, in TurboC how embedded C language programming, assembly language, computer components, such as the basic principles, independent of the SOC design is based on the 8086 hardware and software capabilities.
Platform: | Size: 6281216 | Author: xiaoxu | Hits:

[VHDL-FPGA-Verilog] cpu86

Description: CPU86 8086. IP core.
Platform: | Size: 436224 | Author: Tru | Hits:

[VHDL-FPGA-Verilog] 8086

Description: 基于FPGA的8086/8088 IP核-8086/8088 FPGA IP Core
Platform: | Size: 9769984 | Author: chengliu | Hits:

[VHDL-FPGA-Verilog] 8086IP

Description: 8086IP Core 源码 VHDL版-8086 IP CORE source code（VHDL）
Platform: | Size: 71680 | Author: 段长江 | Hits:

[VHDL-FPGA-Verilog] _8259A

Description: 　 8259A是专门为了对8085A和8086/8088进行中断控制而设计的芯片，它是可以用程序控制的中断控制器。单个的8259A能管理8级向量优先级中断。在不增加其他电路的情况下，最多可以级联成64级的向量优先级中断系统。8259A有多种工作方式，能用于各种系统。各种工作方式的设定是在初始化时通过软件进行的。在总线控制器的控制下,8259A芯片可以处于编程状态和操作状态.编程状态是CPU使用IN或OUT指令对8259A芯片进行初始化编程的状态- 8259A is designed to be on the 8085A and 8086/8088 designed to interrupt control chip, which is the interrupt controller can be programmed. 8259A can manage a single priority interrupt vector 8. Without increasing the other circuit cases, up to 64-level cascaded priority interrupt system vector. 8259A there are several methods of work, can be used in a variety of systems. A variety of work settings is carried out by software initialization. Under the control of the bus controller, 8259A chip can be programmed at the state and operating state. Programming state is CPU use IN or OUT instruction program on the 8259A chip, to initialize the state of
Platform: | Size: 764928 | Author: keven | Hits:

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[assembly language] 8086

[VHDL-FPGA-Verilog] 8bit Cpu designing

[VHDL-FPGA-Verilog] cpuTerminate

[VHDL-FPGA-Verilog] cpu86model

[VHDL-FPGA-Verilog] designgamebasedonFPGA

[assembly language] 8086

[OS program] 8086IP

[VHDL-FPGA-Verilog] Eat_beans_on_the_8086_games

[VHDL-FPGA-Verilog] cpu86

[VHDL-FPGA-Verilog] 8086

[VHDL-FPGA-Verilog] 8086IP

[VHDL-FPGA-Verilog] _8259A

[VHDL-FPGA-Verilog] 8086code

[VHDL-FPGA-Verilog] 8086

[VHDL-FPGA-Verilog] 92977818259a

[VHDL-FPGA-Verilog] intel_i8085_VHD

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