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[VHDL-FPGA-VerilogNIOS_TFT

Description: 用Quartus II 8.0(32bit),NIOS编译环境下,用TFT做的一个数码相框,附加原理图和veri-log程序代码-Using Quartus II 8.0 (32bit), NIOS compiler environment, TFT do with a digital photo frame, attached schematic and program code veri-log
Platform: | Size: 14394368 | Author: 涂龙 | Hits:

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