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Description: 可综合的VerilogHDL设计实例:
---简化的RISC 8位CPU设计简介---
-VerilogHDL be integrated design example:--- simplified RISC 8 bit CPU design Introduction---
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Size: 219136 |
Author: hulin |
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Description:
一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
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Size: 275456 |
Author: wfs |
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Description: 8位RISC CPU,包括alu,count,machine-8 bit risc cpu
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Size: 3072 |
Author: 刘成诚 |
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Description: 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
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Size: 79872 |
Author: 曾亮 |
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Description: 8bit RISC cpu 设计资料 包含夏宇闻老师的教程第8章-8bit RISC cpu design
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Size: 816128 |
Author: dyfdown |
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Description: 8 Bit RISC CPU implementation in VHDL
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Size: 5120 |
Author: Mufossa |
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Description: 八位简易risccPU,采用verilog描述,FPGA实现-8bit risc CPU
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Size: 470016 |
Author: 于斌 |
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Description: 8位RISC CPU 设计IP,包含了文档、代码、仿真环境等-8BIT RISC MCU implemention reference ip,include rtl code,simulation and document
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Size: 2382848 |
Author: zhangbin |
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