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Description: 在ACEX EP1K30TC144-3实现了闹钟功能,并能修改定时,和当前时间
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Size: 524608 |
Author: 谢文 |
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Description: 介绍了利用ALTERA公司的Maxplus Ⅱ软件及ACEX芯片,基于一种用于三相电压型逆变器的优化SVPWM算法,来实现变频调速系统,该算法采纳Kohonen神经网络的优点。选择适当的调制方法和改进的算法，不但可以显著地缩短计算时间,且显著减少开关损耗。用复杂可编程逻辑器件(CPLD) 来实现这种算法非常简单合适。
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Size: 98553 |
Author: zt209@hotmail.com |
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Description: 在ACEX EP1K30TC144-3实现了闹钟功能,并能修改定时,和当前时间-ACEX EP1K30TC144-3 in the realization of the alarm clock function, and can modify from time to time, and the current time
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Size: 524288 |
Author: 谢文 |
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Description: 运用ACE解析xml文件的实例源码，需要的人可以下载参考。对其他系统一样可用。-Analysis of the use of ACE source xml document instance, those who need it can download the reference. Other systems available on the same.
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Size: 247808 |
Author: xiong9937 |
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Description: - 与摩托罗拉的SPI规格兼容 - 增强摩托罗拉MC68HC11串行外设接口 - 4项深读FIFO - 4项深写入FIFO - 中断后1代，2，3或4个转移字节 - 8位WISHBONE RevB.3经典界面 - 经营的输入时钟频率范围广泛 - 静态同步设计 - 完全可合成 - 130LUTs在Spartan-II，230在ACEX LCELLs的-- Compatible with Motorola s SPI specifications
- Enhanced Motorola MC68HC11 Serial Peripheral Interface
- 4 entries deep read FIFO
- 4 entries deep write FIFO
- Interrupt generation after 1, 2, 3, or 4 transfered bytes
- 8 bit WISHBONE RevB.3 Classic interface
- Operates from a wide range of input clock frequencies
- Static synchronous design
- Fully synthesizable
- 130LUTs in a Spartan-II, 230 LCELLs in an ACEX
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Size: 575488 |
Author: 张居林 |
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Description: 目前很多USB BLASTER下载线不能正确烧写和调试CYCLONE III器件，还有部分低价产品会出现烧毁目标芯片的问题。华升EDA凭借10多年在CPLD，FPGA开发方面的经验，将最大限度保证我们产品的兼容性和稳定性。-FPGA：Stratix、Stratix II、Stratix II ,Cyclone、Cyclone II、Cyclone III、ACEX 1K、APEX 20K
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Size: 633856 |
Author: lufeng |
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