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[Other resourceADC_16bit

Description: 用verilog硬件描述语言编写的16位数模转换器的源代码,可以综合-with verilog hardware description language of 16 Digital to Analog source code can be integrated
Platform: | Size: 1671 | Author: awp | Hits:

[Other resourceADC_16bit

Description: 16位ADCverilog hdl 代码
Platform: | Size: 1769 | Author: skdk | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: 用verilog硬件描述语言编写的16位数模转换器的源代码,可以综合-with verilog hardware description language of 16 Digital to Analog source code can be integrated
Platform: | Size: 1024 | Author: awp | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: 16位ADCverilog hdl 代码-16 ADCverilog hdl code
Platform: | Size: 1024 | Author: skdk | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: 模数变换器,采用verilog hdl编写-Analog-to-digital converters, used to prepare verilog hdl
Platform: | Size: 1024 | Author: 江浩 | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: VERILOG 16-bit Analogue-Digital Converter-VERILOG16-bit Analogue-Digital Converter
Platform: | Size: 1024 | Author: likui | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: 16位ADC的verilog源代码 16-bit Analogue-Digital Converter-16-bit ADC verilog source code 16-bit Analogue-Digital Converter
Platform: | Size: 2048 | Author: wangzhenliang | Hits:

[Software EngineeringADC_16bit.v

Description: 一个verilog编写的16位ADC程序。该程序方便了DAC的设计人员对DAC提供输入信号,以此可以获得理想的DAC所需信号-Verilog to write a 16-bit ADC program. The program facilitates the DAC' s designers to provide input signals to the DAC, in order to be able to get a good DAC desired signal
Platform: | Size: 1024 | Author: 徐振涛 | Hits:

[OtherADC_16bit

Description: 16 bit adc code for analog to digital conversion
Platform: | Size: 1024 | Author: sameer | Hits:

[VHDL-FPGA-VerilogADC_16bit

Description: adc 16b thi no la nhu vay do
Platform: | Size: 1024 | Author: tailuong | Hits:

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