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[SourceCodeadpcm

Description: 本设计采用vhdl实现语言信号的编解码设计,经过quartus综合,布局布线,验证。
Platform: | Size: 1326609 | Author: denghua | Hits:

[Speech/Voice recognition/combineADPCMCodec

Description: Project and source code for ADPCM
Platform: | Size: 717824 | Author: shiva | Hits:

[VHDL-FPGA-Verilogima_adpcm_encoder_latest.tar

Description: This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file. Compression ratio is fixed for IMA-ADPCM, being 4:1. PLEASE NOTICE THAT THIS CORE IS LICENSED UNDER http://creativecommons.org/licenses/by-nc-sa/3.0/ (Creative Commons Attribution-Noncommercial-Share Alike 3.0 Unported). That means you may use it only for NON-COMMERCIAL purposes.
Platform: | Size: 23552 | Author: Arun | Hits:

[Multimedia programADPCM_audio_codec

Description: ADPCM语音编解码电路设计及FPGA实现。利用FPGA进行ADPCM编码与解码。-ADPCM voice codec circuit design and FPGA realization. FPGA for use ADPCM encoding and decoding.
Platform: | Size: 125952 | Author: 水牛EDA | Hits:

[VHDL-FPGA-VerilogADPCM

Description: APPCM算法和AD/DA芯片驱动在CPLD中的实现,已在实际硬件中测试OK,quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
Platform: | Size: 1327104 | Author: jiajunxian | Hits:

[VHDL-FPGA-Verilogfifo

Description: 同步FIFO 创建一个256x8大小的同步FIFO,并通过串口发送数据初始化FIFO,FPGA内部读取FIFO的数据通过窗口发送到PC-FIFO
Platform: | Size: 4096 | Author: 赵云 | Hits:

[Otheradpcm-and-ppt

Description: 包括adpcm的简单讲义 adpcm解码Verilog代码 adpcm编码代码-Including handouts adpcm decoder adpcm simple Verilog code for adpcm coding code
Platform: | Size: 180224 | Author: 谭利民 | Hits:

[VHDL-FPGA-VerilogADPCM

Description: ADPCM ENCODER and DECODER
Platform: | Size: 1513472 | Author: hr | Hits:

[Compress-Decompress algrithmsADPCM

Description: I need code for data compression
Platform: | Size: 12288 | Author: gopal | Hits:

[VHDL-FPGA-VerilogADPCMCodec

Description: The DVI Adaptive Differential Pulse Code Modulation (ADPCM) algorithm was first described in an IMA recommendation on audio formats and conversion practices [1]. ADPCM is a transformation that encodes 16-bit audio as 4 bits (a 4:1 compression ratio). In order to achieve this level of compression, the algorithm maintains an adaptive value predictor, which uses the distance between previous samples to store the most likely value of the next sample. The difference between samples is quantized down to a new sample using an adaptive step-size. The algorithm in [1] suggests using a table to adapt this step-size to the analyzed data. ADPCM has become widely used and adapted, and a variant of the algorithm performs voice encoding on cellular phones (allowing minimal data to be sent across the wireless network and increasing throughput).
Platform: | Size: 439296 | Author: stefanescul | Hits:

[VHDL-FPGA-VerilogADPCMEncoder

Description: ADPCM encoder with ICON, VIO, ILA, working on Xilinx ISE and chipscope.
Platform: | Size: 1024 | Author: DANIEL PAN | Hits:

[VHDL-FPGA-VerilogADPCMDecoder

Description: ADPCM decoder working on Xilinx ISE 12.2 code includes core ICON ILA VIO test on chipscope
Platform: | Size: 2048 | Author: DANIEL PAN | Hits:

[VHDL-FPGA-VerilogADPCMverilog

Description: ADPCM编码的Verilog编码实现,代码有详细的注释,编译通过-ADPCM coding Verilog code, the code has detailed notes, compiled by
Platform: | Size: 2452480 | Author: 郭暧闵 | Hits:

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