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[
VHDL-FPGA-Verilog
]
altpll0
Description:
锁相环的证实程序，可以在任何编译器中执行，但是要是TI公司的平台。-Confirmed by phase-locked loop process can be run on any compiler, but if TI' s platform。
Platform:
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Size:
3072
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Author:
张建平
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