Description: Arbiter.v verilog实现
三路请求,使用循环策略的仲裁器
含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit Platform: |
Size: 2048 |
Author:夏虫 |
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Description: amba总线桥:ahb to asb!verilog hdl文档加代码,非常全,soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc Platform: |
Size: 165888 |
Author:zhangyiyun |
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Description: 该源码包是2.0版本的AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型,AHB总线上从设备RAM模型,参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave,Defines. Platform: |
Size: 17408 |
Author:jinjin |
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Description: amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde,amba AHB coding in verilog HDL and integrating with AHB to AXI Brigde Platform: |
Size: 5120 |
Author:videv |
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Description: AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型-AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave Platform: |
Size: 17408 |
Author:zhch26 |
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Description: Verilog code for apb explains the state machine of amba ahb protocol.it is very using full for beginners explain each of the states clearly just download Platform: |
Size: 588 |
Author:ganapathi1231@outlook.com |
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