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[Other] I2C_APB_ds_v1.0

Description: 关于i2c master/slaver control 方面的技术资料 介绍其特色与使用方法-On the i2c master/slaver control of technical information on their characteristics and use
Platform: | Size: 111616 | Author: gaoguoxin | Hits:

[Other] sc_apbSlave

Description: systemc写的apb slave程序，用于实现apb总线上的slave-systemc write apb slave procedure used to implement apb bus slave
Platform: | Size: 1024 | Author: Hanshan | Hits:

[VHDL-FPGA-Verilog] APB

Description: It s the verilog source code for AMBA APB 2.0 Slave
Platform: | Size: 4096 | Author: nachi | Hits:

[Software Engineering] AHBtoAPB

Description: AHBtoAPB设计基于AMBA总线协议的APB Bridge设计-AHB to APB designThe AHB to APB bridge interface is an AHB slave. When accessed (in normal operation or system test) it initiates an access to the APB.
Platform: | Size: 114688 | Author: 李雷 | Hits:

[assembly language] System_Verilog_Tutorial

Description: hi im writing APB slave program to verify my desing pls help me to writ
Platform: | Size: 2398208 | Author: dananjeya | Hits:

[Delphi/CppBuilder] aaa

Description: hi every one i need source code for APB slave can any give the sorce code for that-hi every one i need source code for APB slave can any give the sorce code for that...
Platform: | Size: 8192 | Author: dhanu | Hits:

[Other] apb_bridge

Description: AMBA AHB总线上连接慢速设备的slave,通过 apb_bridge桥实现AHB到APB的转换-AMBA apb_bridge
Platform: | Size: 2048 | Author: 朱哲 | Hits:

[VHDL-FPGA-Verilog] APB_slave

Description: APB slave template for AMBA bus written in Verilog
Platform: | Size: 1024 | Author: corgano | Hits:

[VHDL-FPGA-Verilog] ahb_slave_latest.tar

Description: In this we have APB bus slave for burst data transfer
Platform: | Size: 5120 | Author: shubham | Hits:

[VHDL-FPGA-Verilog] wdog_sp805

Description: 看门狗模块是一个AMBA从属模块连接到高级 外设总线（APB）。看门狗模块包括一个32位的递减计数器用 可编程超时间隔具有产生中断和能力 对超时复位信号。它的目的是要使用到复位应用于在一个系统 事件的软件故障。-The Watchdog module is an AMBA slave module and connects to the Advanced Peripheral Bus (APB). The Watchdog module consists of a 32-bit down counter with a programmable timeout interval that has the capability to generate an interrupt and a reset signal on timing out. It is intended to be used to apply a reset to a system in the event of a software failure.
Platform: | Size: 212992 | Author: st | Hits:

[Other] apb_dut

Description: it is a verilog code for the apb slave dut
Platform: | Size: 8192 | Author: vivek | Hits:

[Program doc] apb_slave.v.tar

Description: apb slave program in verilog
Platform: | Size: 1024 | Author: jp | Hits:

[VHDL-FPGA-Verilog] apb_slave_latest.tar

Description: APB slave master uding verilog
Platform: | Size: 4096 | Author: vivek | Hits:

[VHDL-FPGA-Verilog] apb

Description: APB 总线。可以实现单个数据在总机与从机之间的读写功能(This can achieve the read and write functions of a single data between the master and the slave .)
Platform: | Size: 1024 | Author: zxppppppppp | Hits:

[Other] ahb2apb-master

Description: ahb to apb master and slave
Platform: | Size: 3072 | Author: Sheth | Hits:

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