Search - ARM testbench

[Other resource] core_arm.tar

Description: vhdl的arm核包含testbench
Platform: | Size: 666523 | Author: dc | Hits:

[VHDL-FPGA-Verilog] core_arm.tar

Description: vhdl的arm核包含testbench-VHDL Testbench contain the nuclear arm
Platform: | Size: 666624 | Author: dc | Hits:

[VHDL-FPGA-Verilog] BP062-BU-01000-r0p0-00rel0[1][1].tar

Description: AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
Platform: | Size: 313344 | Author: 李忠孝 | Hits:

[VHDL-FPGA-Verilog] uploaded-code

Description: 1.密码生成器，将128个比特的源码编为密码输出并可以实现循环操作。 2.ARM测试从机，是ARM9的一个测试从机，端口配置正确，并已用于实际工作中。-A password generator, 128 bits of source code compiled for the password output and cycle operation can be achieved. 2.A testbench for ARM.It is a testbench of the ARM9,the slave port configuration is correct, and has been used in the actual work.
Platform: | Size: 371712 | Author: 李宇 | Hits:

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[Other resource] core_arm.tar

[VHDL-FPGA-Verilog] core_arm.tar

[VHDL-FPGA-Verilog] BP062-BU-01000-r0p0-00rel0[1][1].tar

[VHDL-FPGA-Verilog] uploaded-code

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