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Description: 数据结构文本编辑器课程设计 数据结构文本编辑器课程设计-data structure text editor curriculum design d ata structure text editor curriculum design d ata structure text editor curriculum design
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Size: 2379 |
Author: 水晶 |
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Description: 数据结构课程设计 数据结构课程设计-data structure course design d ata structure course design
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Size: 38526 |
Author: ss |
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Description: 数据结构文本编辑器课程设计 数据结构文本编辑器课程设计-data structure text editor curriculum design d ata structure text editor curriculum design d ata structure text editor curriculum design
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Size: 2048 |
Author: 水晶 |
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Description: 数据结构课程设计 数据结构课程设计-data structure course design d ata structure course design
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Size: 37888 |
Author: ss |
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Description: 用AVR单片机设计的MP3播放器
功能：
MP3 Player
IDE ATA interface
FAT 32 with long file name support
USB interface
On board power supply (input from 7v to 20v DC)
Bootloader firmware upgradeable via USB port
Infrared bi-directional interface
Remote Control
Back light graphic LCD
worked with only 2x AA batteries
In sleep mode sink less than 1uA (2.5mA in active mode)
5 buttons for easy navigation
Long range (more than 20 feets)
-AVR single-chip design with MP3 player function: MP3 Player IDE ATA interface FAT 32 with long file name support USB interface On board power supply (input from 7v to 20v DC) Bootloader firmware upgradeable via USB port Infrared bi-directional interface Remote Control Back light graphic LCD worked with only 2x AA batteries In sleep mode sink less than 1uA (2.5mA in active mode) 5 buttons for easy navigation Long range (more than 20 feets)
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Size: 881664 |
Author: 谭志成 |
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Description: Learn about the design tradeoffs involved in creating Windows CE .NET operating system (OS) solutions for hardware that implements one of many nonvolatile storage technologies. Different storage technologies, such as NAND and NOR flash memory, masked ROM, and electromechanical Advanced Technology Attachment (ATA) or Integrated Drive Electronics (IDE) storage, impose design constraints and create opportunities for the software environment. (30 printed pages)-Learn about the design tradeoffs involved in creating Windows CE. NET operating system (OS) solutions for hardware that implements one of many nonvolatile storage technologies. Different storage technologies, such as NAND and NOR flash memory, masked ROM, and electromechanical Advanced Technology Attachment ( ATA) or Integrated Drive Electronics (IDE) storage, impose design constraints and create opportunities for the software environment. (30 printed pages)
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Size: 41984 |
Author: 肖小 |
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Description: 基于USB-ATA接口的海量存储器的设计与实现-Based on the USB-ATA mass storage interface of the Design and Implementation
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Size: 86016 |
Author: 李浩 |
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Description: 分析了硬盘容量限制的成因以及LBA 48b寻址模式对137．4GB容量的突破。在此基础上进一步分析
了Vxworks平台下不能识别超过137．4GB容量硬盘的原因。然后根据硬盘LBA 48b寻址模式的原理，分析如
何修改Vxw0rks平台下的ATA驱动程序，最终达到支持大容量硬盘的能力-Analysis of the causes of hard drive capacity, as well as addressing mode LBA 48b breakthrough capacity of 137.4GB. On the basis of further analysis can not be identified under Vxworks platform over the causes of hard drive capacity 137.4GB. LBA 48b based on the hard disk of the principle of addressing modes, analysis of how to modify the platform Vxw0rks procedures under the ATA drive, and ultimately achieve the support of large-capacity hard drive capacity
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Size: 219136 |
Author: cxb |
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Description: 第一章到第五章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter to Chapter V of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, function authentication, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
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Size: 1580032 |
Author: xiao |
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Description: 第六章到第九章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter VI to Chapter IX of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
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Size: 6281216 |
Author: xiao |
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Description: 第十章的代码。
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示-Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate
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Size: 6872064 |
Author: xiao |
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Description: 第十一章到第十三章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
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Size: 5088256 |
Author: xiao |
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Description: CY4611B - USB 2.0 USB to ATA Reference Design
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Size: 405504 |
Author: Nikita |
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Description: 嵌入式ATA主机控制器IP核设计host controller -Embedded ATA host controller IP core design
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Size: 322560 |
Author: pin |
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Description: This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for building a complete, reliable, high-performance SATA solution by utilizing a design platform from Missing Link Electronics (MLE).
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Size: 390144 |
Author: mancity |
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Description: 能够完成硬件数据传输,包括PIO传输、MDMA传输、UDMA传输。程序设计是基于Windows协议，支持PIO传输，由2个block组成。-Able to complete the hardware data transmission, including PIO transfers, MDMA transmission, UDMA transfer. Program design is based on Windows protocol that supports PIO transfers by two block components.
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Size: 1346560 |
Author: 陈 |
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Description: 12.2 ATA主机控制器设计
12.3 ATA主机控制器Testbench设计 -12.2 ATA host controller design 12.3 ATA host controller Testbench Design
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Size: 1319936 |
Author: shixiaodong |
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Description: IP电话专用芯片 The Micrel KSZ8342Q 文档资料。-The Micrel KSZ8342Q Analog Telephone Adapter (ATA) supplies a complete solution for enterprise and residential environments,
converting analog signals from a traditional telephone of fax machine for transmission over IP.
By incorporating an advanced DSP, the KSZ8342Q ATA solution provides all logic necessary for performing analog to digital telephone with connection to IP telephony. The KSZ8342Q ATA device is available in a RoHS-compliant 128-lead QFP package.
The KSZ8342Q ATA device leverages Micrel s core technology competencies including:
• High degree of integration
• Efficient switching
• Low-powered PHY transceivers
• Green design with integrated Energy Efficient Ethernet (EEE)
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Size: 1087488 |
Author: dong.jw |
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Description: ATA Inteface Verilog Design
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Size: 835584 |
Author: richman |
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Description: cy4615b usb to ata reference design
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Size: 5191680 |
Author: mike |
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