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Description: 10进制to BCD转换算法-Decimal to BCD conversion algorithm
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Size: 1024 |
Author: 好 |
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Description: convert.asm:
1.From ASCII resp. BCD to binary
2.From binary to ASCII resp. BCD
3.From binary to Hex-ASCII
Bin_Bcd.c:
uchar BcdToBin(uchar val)
uchar BinToBcd(uchar val) -convert.asm : 1.From ASCII resp. BCD 2.From binary to binary t o ASCII resp. BCD 3.From binary to Hex-ASCII Bin _Bcd.c : uchar BcdToBin (uchar val) uchar BinToBcd (uch ar val)
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Size: 5120 |
Author: jack |
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Description: BCD码和16/32位有符号以及无符号整型数之间的转换-BCD and 16/32 bits signed and unsigned integer conversion between the
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Size: 1024 |
Author: huhc |
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Description: BCD码和二进制码转换的硬件实现.pdf-BCD code and binary code conversion hardware. Pdf
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Size: 140288 |
Author: 张三 |
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Description: BCD转BIN算法,BCD码转二进制数据。-BCD to BIN algorithm, BCD code to binary data.
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Size: 1024 |
Author: zjh |
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Description: Binary to BCD arithmetic.
这东西真不错-Binary to BCD arithmetic. This is something really good
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Size: 3072 |
Author: Reguse |
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Description: it is a binary16 to BCD converter .it will work on spartan 3 xilini devices.
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Size: 1024 |
Author: ali |
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Description: Binary to BCD converter
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Size: 1024 |
Author: Natacho |
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Description: vhdl编写的将二进制转BCD码的程序.直接源代码,适合新手编程,语法学习-BCD
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Size: 202752 |
Author: yjh |
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Description: General Binary-to-BCD Converter
The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
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Size: 25600 |
Author: volkan |
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Description: verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
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Size: 1024 |
Author: 王先生 |
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Description: verilog code for bcd adder
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Size: 10240 |
Author: sandeep |
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Description: 4位bcd码加法器的verilog代码 -4 bit bcdadder verilog4 bit bcdadder verilog
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Size: 3072 |
Author: 严迪超 |
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Description: 各种初学Verilog者需要练习的实例代码集锦,包含加法器,BCD计数器,2分频,交通灯等等!-Beginners need to practice a variety of examples of Verilog code highlights, including the adder, BCD counters, 2 frequency, traffic lights and more!
Platform: |
Size: 32768 |
Author: lyh |
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Description: BCD码减法实现程序,非常完整,采用Verilog HDL语言实现。-BCD subtraction to achieve program code, very complete, using Verilog HDL language.
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Size: 155648 |
Author: 江浩 |
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Description: 二进制转BCD码 verilog hdl Quartus II 9.0sp2 编译通过 所有的文件-Binary to BCD code verilog hdl Quartus II 9.0sp2 compile all the documents
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Size: 286720 |
Author: 王冠 |
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Description: Binary counter design in verilog
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Size: 176128 |
Author: Armaghan |
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Description: Codigo BCD en lenguaje descriptivo verilog CINVES
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Size: 1024 |
Author: danoboook |
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Description: 用Verilog语言编程实现4位BCD计数器的功能(Write the programm with Verilog language to implement the function of 4 - bit BCD counter.)
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Size: 25600 |
Author: limaozi |
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Description: 多种基本功能的Verilog代码实现,包括多路选择器,二进制到BCD码转换,二进制到格雷码转换,7段译码器,8位数据锁存器,移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit data latch, shift register and many other functions.)
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Size: 18432 |
Author: MMK1 |
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