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Description: An encoder/decoder for binary BCH codes
Error correction using the BERLEKAMP-MASSEY ALGORITHM.Any (valid) code length can be input-An encoder/decoder for binary BCH codes Er Ryan correction using the BERLEKAMP- MASSEY ALG ORITHM.Any (valid) code length can be input
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Size: 5120 |
Author: 里海 |
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Description: RS码和BCH码译码的MATLAB源文件，可以作为C代码的参考-RS code and BCH Decoding the MATLAB source file can be used as the reference C code
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Size: 2048 |
Author: gaocheng |
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Description: bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
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Size: 136192 |
Author: linchan |
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Description: BCH编码器并行8路实现，速率达到300M以上-BCH encoder realize 8-channel parallel, the rate reached more than 300M
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Size: 2048 |
Author: 张凯斌 |
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Description: 自己年编写的matlab中bch码的仿真程序。有编码和译码2个主程序，附有运行结果。-Their own, prepared in BCH code in matlab simulation program. Coding and decoding has two main program, with the results.
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Size: 3072 |
Author: guxuhui |
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Description: it is used to understand the basic working of a BCH encoder/Decoder
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Size: 33792 |
Author: arunagiri |
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Description: Reed Solomon and BCH Encoder
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Size: 2048 |
Author: sshain |
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Description: BCH Encoder BCH encoder realize 8-channel parallel, the rate reached more th
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Size: 77824 |
Author: Adel |
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Description: 主要仿真了二进制的BCH码采用BM算法的编码以及解码的过程-An encoder/decoder for binary BCH codes Error correction using the BERLEKAMP-MASSEY ALGORITHM
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Size: 5120 |
Author: 雪林 |
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Description: Syntetizable source code of VHDL BCH(1023,1013) encoder. This scheme used by DTMB standart and produce ten redundancy bit on 125 cycles because bus width of 8 bits.
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Size: 8192 |
Author: Juan |
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Description: this bch encoder verilog code-this is bch encoder verilog code
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Size: 2048 |
Author: rakhi |
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Description: In this project, we are implementing the error detection and correction using BCH code (Bose Chaudhuri Hocquenghem). Using VHDL and targeted on FPGA for synthesis of the code. The encoder and decoder combine called as a codec.
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Size: 6164480 |
Author: venkata vijay |
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Description: BCH ENCODER DECODER -BCH ENCODER DECODER
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Size: 7168 |
Author: pradeep |
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Description: bch encoder for bpsk system in awgn channel
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Size: 2048 |
Author: shawn |
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Description: 提出一种应用于 NAND Flash 控制器的并行 BCH 编/译码器，在译码阶段引入流水线操作和分组预取译码操作，提升 BCH 码的译
码效率。实验结果表明，在 NAND Flash 的 2 KB 页读取操作中，该编/译码器纠正 8 bit 的随机错误只需要 565 个周期的译码时间，是采用按页预取译码方式所需时间的 1/4。
-Anew architecture of parallel BCH encoder and decoder applied in NAND Flash Controller is proposed. In order to obviously increase the throughput of decoder, pipeline operation and prefetch decoding in group operation are applied in the design. It takes 565 cycles to correct 8 bit random error after NAND Flash’s 2 KB page read operation, which is a quarter of the time cost by prefetch & decode in page.
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Size: 1088512 |
Author: misslu |
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Description: the matlab code of BCH encoder
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Size: 1024 |
Author: Peter |
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Description: 使用HLS完成BCH编码的运算通路的设计，纯组合逻辑，对于65nm工艺可跑上1GHz。已经组合逻辑分为了多个部分，可在每一个部分之间插流水线。 附上可综合的纯RTL Code以及C++代码，以及Modelsim仿真。 可通过我的优化选项来学习如何优化HLS工具生产的代码。(BCH Encoder realized using HLS tool. Combinational logic.)
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Size: 14505984 |
Author: 蔡宇杰
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Description: NAND BCH Encoder source code
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Size: 3072 |
Author: yasohn |
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Description: NAND BCH coder source code
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Size: 2048 |
Author: yasohn |
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Description: BCH encoder and decoder over awgn channel
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Size: 351232 |
Author: ksyadav |
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