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[Other resourcecf_vhdl

Description: CF VHDL The CF+ design was designed using the timing diagrams of the Compact Flash specification rev. 1.4, Analog Devices ADSP-218xN DSP Microcomputer specification, and the Intel StrataFlash Memory 28F320J3 specification.
Platform: | Size: 700616 | Author: gbh | Hits:

[SourceCodeVHDL 读CF卡

Description: 用VHDL读CF卡
Platform: | Size: 10624 | Author: woainankai888@163.com | Hits:

[VHDL-FPGA-Verilogcf_vhdl

Description: CF VHDL The CF+ design was designed using the timing diagrams of the Compact Flash specification rev. 1.4, Analog Devices ADSP-218xN DSP Microcomputer specification, and the Intel StrataFlash Memory 28F320J3 specification. -CF VHDLThe CF+ Design was designed using the timing diagrams of the Compact Flash specification rev. 1.4, Analog Devices ADSP-218xN DSP Microcomputer specification, and the Intel StrataFlash Memory 28F320J3 specification.
Platform: | Size: 700416 | Author: gbh | Hits:

[Windows CEpda

Description: PXA255外围扩展功能,使用LC4256-176TQFP。扩展了CF卡、分时复用串口、电源管理、键盘等接口/功能。-PXA255 external expansion function, use the LC4256-176TQFP. Expansion of the CF card, time-sharing multiplexed serial port, power management, keyboard interface/functionality.
Platform: | Size: 3072 | Author: 消闲 | Hits:

[Driver DevelopCF_Card

Description: CF卡的驱动程序 内附quartus功能模块-CF card driver included quartus function module
Platform: | Size: 11264 | Author: 阿飞 | Hits:

[VHDL-FPGA-VerilogCF1

Description: 用VHDL语言实现的CF卡读写源代码,用quartus仿真通过,可实现正常的读写功能-VHDL language with the CF card reader source code, by using quartus simulation, the normal read and write capabilities can be realized
Platform: | Size: 2831360 | Author: 刘杰 | Hits:

[VHDL-FPGA-Verilogcf-fft

Description: 用ip核实现fft。用vhdl编写。altera的fpga-Ip core implementation using fft. Written in vhdl
Platform: | Size: 5501952 | Author: 任天鹏 | Hits:

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