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[Parallel Port] vhdl-com

Description: 一些vhdl的常用程序，包括键盘扫描-instantiate some common procedures, including scanning keyboard, etc
Platform: | Size: 2111 | Author: 阿飞 | Hits:

[Parallel Port] vhdl-com

Description: 一些vhdl的常用程序，包括键盘扫描-instantiate some common procedures, including scanning keyboard, etc
Platform: | Size: 2048 | Author: 阿飞 | Hits:

Description: 看看ARM菜鸟在ARM7上写的操作系统——ARM圈圈操作系统最近在ADuC7027上写了一个ARM_00_OS，头都写晕了，发上来给大家一起来看看。任务按优先级调度，如果处于就绪态且优先级最高的任务有两个或更多，则按时间片轮循调度。支持任务创建、任务删除、内存分配、简单的消息、简单的设备管理、CPU及内存等使用统计等功能。任务可处于ARM模式或THUMB模式，在创建任务时，要指定任务所处于的模式。从这里下载整个文件包：http://blog.21ic.com/more.asp?name=computer00&id=16341 -look at birdie in ARM ARM7 written in the operating system-- the operating system ARM circle recently in ADu C7027 write a ARM_00_OS, write head dizzy, deputy undersecretary for everyone to see. Tasks according to priority scheduling, in place if the state but the highest priority tasks of two or more, according to the time-Round Robin scheduling. Support mission to create, delete tasks, memory allocation, the simple information, a simple device management, CPU and memory usage statistics capabilities. At tasks THUMB ARM model or models in the creation mandate, the mandate should be designated at a model. From here to download the whole package : http :// blog.21ic.com/more.asp name = computer00
Platform: | Size: 360448 | Author: Computer00 | Hits:

[VHDL-FPGA-Verilog] fifo_01

Description: 8位相等比较器，比较8位数是否相等 -- 8-bit Identity Comparator -- uses 1993 std VHDL -- download from www.pld.com.cn & www.fpga.com.cn-eight other phase comparators, Comparing the same whether the median 8-- 8-bit Identity Comparator-- uses 1993 std VHDL-- download from www.pld.com.cn
Platform: | Size: 1024 | Author: 罗兰 | Hits:

[VHDL-FPGA-Verilog] BoothMultiplier

Description: -- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn--- Booth Multiplier-- This file contains a ll the entity-architectures for a complete-- k- bit x k-bit Booth multiplier.-- the design mak es use of the new shift operators available in th e VHDL-93 std-- this design passes the Synplify synthesis check-- download from : www.fpga.com.cn
Platform: | Size: 2048 | Author: 罗兰 | Hits:

[VHDL-FPGA-Verilog] wave_gen

Description: 波形发生器，带TESTBENCH，多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn
Platform: | Size: 1024 | Author: 罗兰 | Hits:

[VHDL-FPGA-Verilog] dpram_fpga

Description: 这是我用vhdl语言，在fpga内部做了一个双口ram的程序。我的邮箱：wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com
Platform: | Size: 2831360 | Author: 李伟 | Hits:

[VHDL-FPGA-Verilog] sdram_control

Description: 这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱：wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com
Platform: | Size: 339968 | Author: 李伟 | Hits:

[SCM] PinYin_InputMethod_C51

Description: 用C51实现的拼音输入法,这是改写的网友 embuffalo、独步上载在www.21ic.com自由发布区的由张凯原作的51上的拼音输入法程序。原作使用了一个二维数组用以查表，我认为这样比较的浪费空间，而且每个字表的索引地址要手工输入，效率不高。所以我用结构体将其改写了一下。就是大家现在看到的这个。因为代码比较的大，共有6,000多汉字，这样就得要12,000 byte来存放GB内码，所以也是没办法的 :-( 编译结果约为3000h,因为大部分是索引表，代码优化几乎无效。在Keil C里仿真芯片选用的是华邦的W77E58，它有32k ROM, 256B on-chip RAM, 1K on-chip SRAM (用DPTR1指针寻址,相当于有1K的片上xdata)。条件有限，没有上片试验，仿真而已。打算将其移植到AVR上，但CodeAVRC与IAR EC++在结构体、指针的定义使用上似乎与C51不太一样，现在还未搞定。还希望在这方面有经验的网友能给予指导。-C51 with the Pinyin input method, which is rewritten netizens embuffalo. Unrivaled www.21ic.com available in the free publication of the original work by Kai-51 on the Pinyin input method procedures . Appreciate the use of a two-dimensional array for the look-up table, I think this is a waste of space. Each of the characters but the index table to manually input address, efficiency is not high. I use the structure to rewrite a bit. We see now is this. Because the code comparison, a total of 6, more than 000 Chinese characters, this must be 12, byte to store 000 GB code, is not the way to compile results :-( about 3000h. because most of the index table. Code Optimization almost ineffective. Keil in the C simulation uses the chip in W77E58 Winbond, It has 32 k ROM 256B on-chip RAM, 1K on-chi
Platform: | Size: 14336 | Author: Jawen | Hits:

[Other] 159357

Description: 是一个用 maxplus2做的vhdl 很平常的课程小设计 -is a maxplus2 do with vhdl very common small design courses
Platform: | Size: 11264 | Author: 李宁 | Hits:

[MPI] altera_avalon_i2c_slave_new

Description: i2c从设备的源码，VHDL语言写的，有疑问请eMail：feng_er_cn@163.com-i2c-source from the equipment, VHDL language, and have questions, please eMail: feng_er_cn@163.com
Platform: | Size: 17408 | Author: 宋大业 | Hits:

[VHDL-FPGA-Verilog] elecfans.com-74783742

Description: FPGA的重要实例,如PSK调制和解调,ASK,FSK-An important example of FPGA, such as PSK modulation and demodulation, ASK, FSK
Platform: | Size: 1278976 | Author: 钟莉 | Hits:

[Com Port] UART_RX

Description: receiver data from computer via com-interface.
Platform: | Size: 463872 | Author: mih | Hits:

[source in ebook] HammingDecoder

Description: -- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee USE ieee.std_logic_1164.ALL ENTITY hamdec IS PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4 dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3 sec, ded, ne : OUT BIT) --diagnostic outputs END hamdec ARCHITECTURE ver1 OF hamdec IS BEGIN --- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection. -- download from: www.pld.com.cn & www.fpga.com.cn LIBRARY ieee USE ieee.std_logic_1164.ALL ENTITY hamdec IS PORT(hamin : IN BIT_VECTOR(0 TO 7) --d0 d1 d2 d3 p0 p1 p2 p4 dataout : OUT BIT_VECTOR(0 TO 3) --d0 d1 d2 d3 sec, ded, ne : OUT BIT) --diagnostic outputs END hamdec ARCHITECTURE ver1 OF hamdec IS BEGIN
Platform: | Size: 4096 | Author: djs | Hits:

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[Parallel Port] vhdl-com

[Parallel Port] vhdl-com

[OS Develop] ARM_00_OS

[VHDL-FPGA-Verilog] fifo_01

[VHDL-FPGA-Verilog] BoothMultiplier

[VHDL-FPGA-Verilog] wave_gen

[VHDL-FPGA-Verilog] dpram_fpga

[VHDL-FPGA-Verilog] sdram_control

[SCM] PinYin_InputMethod_C51

[Other] 159357

[MPI] altera_avalon_i2c_slave_new

[VHDL-FPGA-Verilog] elecfans.com-74783742

[Com Port] UART_RX

[source in ebook] HammingDecoder

[VHDL-FPGA-Verilog] FFT

[VHDL-FPGA-Verilog] ram

[ActiveX/DCOM/ATL] com_port_decoder

[VHDL-FPGA-Verilog] com

[VHDL-FPGA-Verilog] elecfans.com-VHDL

[VHDL-FPGA-Verilog] elecfans.com-VHDL

CodeBus www.codebus.net