Search - CPLD DSP

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[Other resource] idedriver DL : 0: ｉｄｅ的低层驱动程序。一个工程（ｃｐｌｄ＋ｄｓｐ）的一部分。-ide the lower driver. A project (cpld + dsp) part.
Update : 2008-10-13 Size : 57.28kb Publisher : 傅文祥
[Embeded-SCM Develop] cpld_line_cnc DL : 1: cpld+dsp 有需要的可以看看 cpld+dsp 有需要的可以看看 cpld+dsp 有需要的可以
Update : 2008-10-13 Size : 187.4kb Publisher : samuel
[Embeded-SCM Develop] JTAG仿真器CPLD DL : 0: JTAG仿真器CPLD -JTAG Emulator CPLD
Update : 2025-02-17 Size : 337kb Publisher : 李秉
[VHDL-FPGA-Verilog] 终端CPLD逻辑工程文件 DL : 0: 该工程文件实现ARM系统中CPLD的逻辑工作，起到外围资源的逻辑地址译码功能-realization of the project document ARM system CPLD logic, external resources have address decoding logic function
Update : 2025-02-17 Size : 115kb Publisher : 王希
[Embeded-SCM Develop] CPLDNEW DL : 0: 用maxplus2实现的一种通用逻辑模块，背景是一个基于dsp的嵌入式开发板，上面的逻辑模块全用cpld实现。此模块可以供以后的嵌入式开发作参考。-maxplus2 achieved using a common logic modules, background is a DSP-based embedded development board, the above logic modules throughout cpld achieve. This module can be embedded for the future development for reference.
Update : 2025-02-17 Size : 425kb Publisher : hanchong
[DSP program] dsp2cpld DL : 0: dsp下载器cpld程序感兴趣的朋友可以下来-dsp downloader cpld procedures interested friends can see down
Update : 2025-02-17 Size : 137kb Publisher : Scofield
[DSP program] DSPCPLD DL : 0: dsp与cpld的连接原理图，华绑的哦！-dsp and cpld connection diagram, China tied Oh!
Update : 2025-02-17 Size : 15kb Publisher : 冬虫草
[Embeded-SCM Develop] fpga_digit_serial_arithmetic_1 DL : 0: fpga/CPLD开发管理Digit-Serial DSP Functions-fpga/CPLD Development and Management of Digit-Serial DSP Functions
Update : 2025-02-17 Size : 2.54mb Publisher : liuandy
[Embeded-SCM Develop] ARM_DSP_FPGA DL : 0: ARM,DSP,FPGA的区别:详细介绍了ARM，DSP，FPGA/CPLD的异同。-ARM, DSP, FPGA distinction: a detailed introduction of the ARM, DSP, FPGA/CPLD the similarities and differences.
Update : 2025-02-17 Size : 86kb Publisher : 韩彬
[ARM-PowerPC-ColdFire-MIPS] evm5502 DL : 0: TMS320VC5502 DSP BootLoad源码包括CPLD源码-TMS320VC5502 DSP BootLoad including CPLD source source
Update : 2025-02-17 Size : 445kb Publisher : zsw
[DSP program] DSPCPLD DL : 0: DSP与CPLD通信方法有需要的请下载-DSP and CPLD communication methods are needed, please download
Update : 2025-02-17 Size : 58kb Publisher : 李超
[Software Engineering] MAXII_application_handbook(chinese) DL : 0: MAX II CPLD具有灵活的可编程接口，合并了分立的FLASH存储器件，能快速和容易地配置FPGA，DSP，ASIC等。本中文手册将让用户对CPLD有一个宏观的认识。-MAX II CPLD with a flexible programmable interface, the merger of the separation of FLASH memory, can quickly and easily configure the FPGA, DSP, ASIC, etc.. Chinese manual will allow users to have a macro on the CPLD awareness.
Update : 2025-02-17 Size : 967kb Publisher : pantree
[DSP program] DSP-audiocompressPCI DL : 0: 用DSP进行语音压缩的一个开发实例（PCI总线）。详细介绍了PCI总线以及语音压缩数字信号处理系统的软、硬件系统设计方案及架构-DSP for voice compression using the example of a development (PCI bus). Detailed information on PCI bus, as well as voice compression digital signal processing system software and hardware system design and architecture
Update : 2025-02-17 Size : 325kb Publisher : PB
[DSP program] TI_DM6467_SCH_CPLD DL : 0: TI 原装开发板 DM6467 原理图 CPLD 给需要的人-TI original DM6467 development board CPLD schematic to those who need
Update : 2025-02-17 Size : 436kb Publisher : csallon
[Other] DSP DL : 0: 学习fpga/cpld的书籍，介绍quartus 2及dsp builder的使用，-Learning fpga/cpld books, introduced quartus 2 and dsp builder use,
Update : 2025-02-17 Size : 13.35mb Publisher : 彭武军
[Other] TMS320F2812dddd DL : 0: dsp 2812 开发板，包含SCH和PCB-dsp 2812 developing board,including SCH and PCB
Update : 2025-02-17 Size : 24kb Publisher : liu
[Embeded-SCM Develop] DSP DL : 1: 零零电子2407+cpld开发板的源程序，可用于参考学习-Page E-2407+ cpld development board of the source, can be used to refer to learning
Update : 2025-02-17 Size : 945kb Publisher : zhaowenjun
[DSP program] DA DL : 0: 00IC2407＋CPLD板上选用的DA转换器是TI公司的TLC5620,TLC5620是串行4通道8位 DA 转换器，DSP 通过 SPI 与其接口，TLC5620 的工作频率是 1MHZ,所有 DSP 的 SPI也必须设置位1MHZ, -00IC2407+ CPLD DA converter board is selected TI' s TLC5620, TLC5620 is a serial 4-channel 8-bit DA converters, DSP and its interface, through the SPI, TLC5620 operating frequency is 1MHZ, all the DSP' s SPI must also be set bit 1MHZ,
Update : 2025-02-17 Size : 66kb Publisher : lizhenli
[DSP program] AD DL : 0: 2407A 内置 16 通道10 位AD 转换器，在 00IC2407＋CPLD 实验板上只扩展两通道，分别是第0 通道和第8通道，DSP 能承受的A/D 输入信号是0－3.3V，在00IC2407+CPLD 实验板上没有单独采用基准源，直接使用系统的3.3V作为A/D 转换器的基准信号。 -Built-2407A 16-channel 10-bit AD converter, in 00IC2407+ CPLD experiment board extended only two channels, namely, 0-channel and 8-channel, DSP can withstand the A/D input signal is 0-3.3V, in 00IC2407+ CPLD There is no separate test board with reference to directly use the system' s 3.3V, as A/D converter reference signal.
Update : 2025-02-17 Size : 78kb Publisher : lizhenli
[DSP program] cpld_dsp_ld1_ld8 DL : 0: dsp控制lcd的例子共享给大家希望有用到的地方-examples of dsp control lcd
Update : 2025-02-17 Size : 155kb Publisher : richie li

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