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[Other resource] CAN_kuozhan

Description: CAN总线资料， CAN.sch 是protel99se格式文件 CPLD目录是7032的CPLD工程，使用MAX+PULS10.0 test目录是程序工程目录，使用ADS1.2编译该工程，load到SDRAM调试
Platform: | Size: 214454 | Author: pangbai | Hits:

[Other resource] an499_design_example

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。
Platform: | Size: 433012 | Author: 王可见 | Hits:

[Other resource] an499_CN

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。 pdf 的说明文件
Platform: | Size: 192535 | Author: 王可见 | Hits:

[Other Embeded program] CAN_kuozhan

Description: CAN总线资料， CAN.sch 是protel99se格式文件 CPLD目录是7032的CPLD工程，使用MAX+PULS10.0 test目录是程序工程目录，使用ADS1.2编译该工程，load到SDRAM调试-err
Platform: | Size: 220160 | Author: pangbai | Hits:

[VHDL-FPGA-Verilog] an499_design_example

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
Platform: | Size: 433152 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] an499_CN

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。 pdf 的说明文件-CPLD control 8-32M sdram controller maxII epm570 realize. pdf documentation
Platform: | Size: 192512 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
Platform: | Size: 776192 | Author: 费尔德 | Hits:

[SCM] spi_vga_1024x768_20090429

Description: 单片机 低成本显卡方案(cpld+sdram)实现 包括at91sam7s64（可选),cpld,sdram, 支持640-480,到 1920×12-mcu vga dispaly card
Platform: | Size: 287744 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] CPLD_V105

Description: epm240系列cpld的配置文件，实现cpld对flash，uart和sdram的控制等-epm240 series cpld profile, to achieve cpld on the flash, uart and the sdram of the control
Platform: | Size: 309248 | Author: 张枫 | Hits:

[VHDL-FPGA-Verilog] sdram_mdl

Description: verilog编写的对SDRAM的控制的源代码，开发FPGA/CPLD-verilog SDRAM write control of the source code, development FPGA/CPLD
Platform: | Size: 2286592 | Author: luoqv | Hits:

[VHDL-FPGA-Verilog] ourdev_536218

Description: 利用 MAX II CPLD 实现移动 SDRAM 接口-Using MAX II CPLD to implement mobile SDRAM Interface
Platform: | Size: 192512 | Author: LQH | Hits:

[DSP program] cpld_line_cnc

Description: 这是有关cpld设计中的资料，关于硬件语言开发的，需要的可以-This is a 6713 chip in the access code sdram space, need to take a look! !
Platform: | Size: 191488 | Author: 吴广伟 | Hits:

[VHDL-FPGA-Verilog] DDR-with-CoolRunner-II

Description: 详细讲解了CoolRunner II CPLD与DDR SDRAM的接口设计-Explained in detail about the design of the CoolRunner II CPLDs and DDR SDRAM interface
Platform: | Size: 368640 | Author: yanghengxu | Hits:

[VHDL-FPGA-Verilog] BI08D708048AD_V1_IPCore

Description: 基于SDRAM+CPLD+STM32的VGA显示的-SDRAM+ CPLD+ STM32 VGA-based displays
Platform: | Size: 9216 | Author: he | Hits:

[VHDL-FPGA-Verilog] sdr_sdram_epm570

Description: CPLD芯片EPM570对SDRAM的读写操作，通过串口显示。-SDRAM write and read test based on CPLD chip-- EPM570.
Platform: | Size: 1086464 | Author: 黄成林 | Hits:

[Other Embeded program] cpldPsdram(-source-codeasch)

Description: cpld+sdram( source code&sch)
Platform: | Size: 1582080 | Author: 刘琼宇 | Hits:

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