Location:
Search - CPLD USB
Search list
Description: 基于CPLD的USB下载电缆设计.rar-CPLD-based design USB download cable. Rar
Platform: |
Size: 255350 |
Author: 徐钧 |
Hits:
Description: JTAG仿真器CPLD -JTAG Emulator CPLD
Platform: |
Size: 345088 |
Author: 李秉 |
Hits:
Description: cpld与单片机接口设计,利于电子设计及应用- Interface design between microprocessor and cpld ,suit for IC design and application
Platform: |
Size: 8192 |
Author: 宋健 |
Hits:
Description: 这是一款USB接口ISP1582器件实现DMA传输的辅助电路的硬件设计源代码-This is a ISP1582 USB device DMA transmission of the auxiliary circuit hardware design source code
Platform: |
Size: 5120 |
Author: 张国梁 |
Hits:
Description: usb_cpld_code.zip usbjtag - Variations on the implementation of a USB JTAG adapter.-usb_cpld_code.zip usbjtag-o Variations n the implementation of a USB JTAG adapter.
Platform: |
Size: 26624 |
Author: david |
Hits:
Description: 本文介基于CPLD和USB的多路温度数据采集系统-paper-based CPLD and USB multi-channel temperature data acquisition system
Platform: |
Size: 103424 |
Author: 萧墙 |
Hits:
Description: 网上流传的usb_blaster原理图里的CPLD源码,主要是实现usb时序转换成JATG时序输出!-spreading online usb_blaster tenets of the CPLD Ituri source, usb key is timing converted into JATG sequential output!
Platform: |
Size: 52224 |
Author: 冯海 |
Hits:
Description: CPLD在USB20接口中的应用,usb大家都用过吧,不用多说了吧。-CPLD in USB20 interface, the application usb everyone it has been used, among other things, that instead.
Platform: |
Size: 9216 |
Author: 丁明 |
Hits:
Description: 周立功的USB大容量存储开发板带CPLD的代码D的源码-weeks meritorious USB Mass Storage Development strip CPLD the source code D.
Platform: |
Size: 432128 |
Author: guoyaoming |
Hits:
Description: 基于CPLD的USB下载电缆设计.rar-CPLD-based design USB download cable. Rar
Platform: |
Size: 254976 |
Author: 徐钧 |
Hits:
Description: altera USB blaste 制作全套资料。包括原理图、93LC46的配置文件和CPLD的VHDL源程序。-altera USB blaste produced full set of information. Including drawings, 93LC46 configuration files and CPLD VHDL source.
Platform: |
Size: 137216 |
Author: xuphone |
Hits:
Description: 介绍了外置式USB无损图像采集卡的设计和实现方案,它用于特殊场合的图像处理及其相关领域。针对图像传输的特点,结合FPGA/CPLD和USB技术,给出了硬件实现框图,同时给出了FPGA/CPLD内部时序控制图和USB程序流程图,结合框图和部分程序源代码,具体讲述了课题中遇到的难点和相应的解决方案。 -External USB introduce a non-destructive image acquisition card design and implementation of the program, and it is used for special occasions image processing and its related fields. For image transmission characteristics, combined with FPGA/CPLD and USB technology, hardware implementation block diagram is given, at the same time gives the FPGA/CPLD Internal Timing Control charts and USB program flowchart, diagram, and some combination of source code, specifically about the topic Difficulties encountered and the corresponding solutions.
Platform: |
Size: 140288 |
Author: 兰升 |
Hits:
Description: 2812开发板原理图和使用说明,板上有AD,MIC,CPLD,以太网,按键,usb-2812 development board schematics and use of that board have AD, MIC, CPLD, Ethernet, keys, usb
Platform: |
Size: 3030016 |
Author: 林仲逸 |
Hits:
Description: CPLD EPM7256原理图PCB图,已经校验,没有什么问题,制版既可。-CPLD EPM7256 Schematic diagram PCB have been checking, there was no problem with either plate.
Platform: |
Size: 49152 |
Author: 马爽 |
Hits:
Description: 核共振数据采集PCB,实际pcb,布线应该水平还ok得,为51的核和cpld结合,含usb通信。-Nuclear resonance data acquisition PCB, the actual pcb, wiring should be ok too level for the 51 nuclear and CPLD combination with usb communications.
Platform: |
Size: 398336 |
Author: |
Hits:
Description: Altera公司调试CPLD/FPGA用的USBblaster的制作文档,很详细的,已经实践过,绝对没有问题-Altera Corporation debugging CPLD/FPGA used USBblaster production of documents, in great detail, and have done so before, absolutely no problem
Platform: |
Size: 2271232 |
Author: Xinzhong.Ding |
Hits:
Description: 这是一个在MAX II CPLD利用FT245BM 模块实现USB传输的读写程序,用的是Verilog HDL语言-This is a MAX II CPLD module using USB transmit FT245BM reading and writing process, using Verilog HDL language
Platform: |
Size: 975872 |
Author: 杨林成 |
Hits:
Description: 使用68013的测试程序,包含68013固件程序(采用slave FIFO bulk同步读写,EP2 OUT,EP6 IN),驱动,PC端测试用程序。CPLD的VHDL代码-Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
Platform: |
Size: 4731904 |
Author: 李华 |
Hits:
Description: 内容包括:
仿真器原理图.rar
CPLD_XDS510的源码.rar
24C01配置文件.rar
XDS510 Windows驱动程序
详细制作过程说明文档
简介:介绍了基于USB2.0接口的DSP仿真器的研制方法。采用该方法,只需要设计出DSP仿真器的硬件系统和CPLD程序,USB驱动程序的设计采用TI公司提供的源程序,使得仿真器的研制十分简单易行。该仿真器通过实际产品测试,性能可靠。广大的DSP开发者可以使用本文提供的方法制作仿真器。
-Include: schematic simulator. Rar CPLD_XDS510 the source. Rar 24C01 configuration file. Rar XDS510 Windows driver documentation production process in detail Description: USB2.0 interface based on the introduction of the DSP simulator development method. Using this method, only the design of DSP hardware emulator system and CPLD program, USB driver design uses TI provides the source code, the simulator is very simple and easy to develop. The emulator product testing through practical and reliable performance. The majority of the DSP developers can use the methods provided in this article simulator.
Platform: |
Size: 258048 |
Author: KC Chen |
Hits:
Description: USB Blaster 为Altera 公司针对 CPLD / FPGA 推出的高速编程设备-USB Blaster for the Altera Corporation for CPLD/FPGA devices introduced high-speed programming
Platform: |
Size: 2137088 |
Author: 秦广敏 |
Hits: