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[Other resourcemsc1210test1

Description: MSC1210的ADC采集以及RS232通讯读写CPLD的例子程序,已经调试通过。-MSC1210 ADC collection and RS232 communication literacy CPLD examples procedures, Debugging has passed.
Platform: | Size: 67256 | Author: 王栋梁 | Hits:

[Other resourcexapp355

Description: Serial ADC Interface write in VHDL based on xilinx cpld
Platform: | Size: 34080 | Author: jiang | Hits:

[Other resourcearmok01171712

Description: 高速ADC数字示波器项目,采用单片机与CPLD,包含原理图与C代码
Platform: | Size: 211695 | Author: raojin | Hits:

[VHDL-FPGA-VerilogCPLD读取ADS7886

Description:

CPLD读取Ti串行ADC芯片ADSL7886的Verilog代码


Platform: | Size: 709 | Author: agedgm | Hits:

[VHDL-FPGA-Verilogxapp355

Description: Serial ADC Interface write in VHDL based on xilinx cpld
Platform: | Size: 33792 | Author: jiang | Hits:

[SCMarmok01171712

Description: 高速ADC数字示波器项目,采用单片机与CPLD,包含原理图与C代码-ADC high-speed digital oscilloscope project, the use of SCM and CPLD, contains the schematic diagram with the C code
Platform: | Size: 210944 | Author: raojin | Hits:

[SCMCPLDMSP430

Description: 本范例的四大用途: 1.DDS AD9856的应用,敢说是国内首创,从原理图到PCB到源代码全部验证通过; 2.CPLD EPM240的学习板:典型的使用CPLD做高速数据采集(ADS825是40MSPS的ADC); 3.MSP430F149的学习板; 4.高速ADC与DDS联合应用的范例板 -The four purposes of this example: 1.DDS AD9856 application, say is the first, from the schematic to the PCB to the source code for all verified 2.CPLD EPM240 learning board: the use of CPLD to do the typical high-speed data acquisition (ADS825 is 40MSPS the ADC) 3.MSP430F149 learning board 4. high-speed ADC and DDS example of combined board
Platform: | Size: 4074496 | Author: jike | Hits:

[VHDL-FPGA-VerilogADc

Description: 与单片机相比,用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809,根据ADC0809的工作时序使用CPLD产生该控制信号,CPLD启动AD转换后,得到的数据送至单片机并在PC机及数码管上显示AD转换结果。-Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of the experimental device for the ADC0809 ADC0809 Timing CPLD is used to generate the control signal, the CPLD to start the AD conversion, the data sent to the microcontroller and the AD conversion result on the PC and digital tube display
Platform: | Size: 14336 | Author: chen | Hits:

[VHDL-FPGA-VerilogADC

Description: CPLD ADC采集控制源码CPLD ADC采集控制源码-CPLD ADC
Platform: | Size: 1024 | Author: | Hits:

[VHDL-FPGA-Verilogcpld_read_adc

Description: 在可编程逻辑器件cpld里读8通道模数转换器adc的值-themodule read the value of 8 channels ADC in cpld
Platform: | Size: 1024 | Author: jimmy | Hits:

[Other Embeded programhehe

Description: 四个ADC声音信号输入到CPLD中然后进行处理,最终一路输出-Four ADC voice signal is input to the CPLD then processed and eventually all the way out
Platform: | Size: 566272 | Author: Jeff | Hits:

[VHDL-FPGA-VerilogADS7870_CPLD

Description: ADS7870 Serial ADC Interface Using a CPLD
Platform: | Size: 336896 | Author: Eddie | Hits:

[VHDL-FPGA-VerilogADC0804

Description: 控制ADC0804的verilog 代码,cpld/fpga都可以使用,用数码管显示ADC采集的二进制数据。(Control ADC0804 verilog code, cpld / fpga can be used to display the ADC digital tube with the binary data collected.)
Platform: | Size: 1024 | Author: w74177 | Hits:

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