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[OtherCPU_design

Description: 一个简单指令的cpu设计。 可以实现4个指令的的运算。-a simple instructions cpu design. 4 can be achieved directive arithmetic.
Platform: | Size: 181228 | Author: 刘永 | Hits:

[Other resourcecpu_design

Description: 简单的CPU设计数字系统实验,使用的是精简指令,水平代码生成
Platform: | Size: 2364332 | Author: violet | Hits:

[OtherCPU_design

Description: 一个简单指令的cpu设计。 可以实现4个指令的的运算。-a simple instructions cpu design. 4 can be achieved directive arithmetic.
Platform: | Size: 181248 | Author: 刘永 | Hits:

[VHDL-FPGA-Verilogcpu_design

Description: 简单的CPU设计数字系统实验,使用的是精简指令,水平代码生成
Platform: | Size: 2364416 | Author: violet | Hits:

[VHDL-FPGA-Verilogcpu_design

Description: 包括很多种设计方案,其中复杂cpu满足乘除运算,同时设计中包含设计报告模板。-Including many kinds of designs, which cpu to meet the complex multiplication and division operation at the same time the design includes the design report templates.
Platform: | Size: 43672576 | Author: 商客 | Hits:

[VHDL-FPGA-VerilogCPU_design

Description: 微机原理32位微处理器设计。可以完成基本的MIPS指令。-Microcomputer Principle 32 of the microprocessor design. You can complete the basic MIPS instruction.
Platform: | Size: 1024 | Author: Hehe Li | Hits:

[VHDL-FPGA-Verilogcpu_design

Description: FPGA MIPS架构CPU,五段流水线功能,ISE开发,verilog语言,可综合,模拟结果正确,内含设计报告-FPGA MIPS CPU, simple five-stage pipeline function, developed by ISE, using verilog language
Platform: | Size: 2428928 | Author: leo | Hits:

[OtherCPU_Design

Description: 基于VHDL的CPU的设计,本科课程设计,实现了一个指令集,能计算加减乘。-CPU design VHDL-based undergraduate curriculum design and implementation of a set of instructions, subtraction, multiplication, can be calculated.
Platform: | Size: 1951744 | Author: | Hits:

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