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Description: FIR的优化设计 基于CSD码量化 提出了一种降低滤波器运算量的改进方法-Optimal design of FIR based on CSD code to quantify a lower filter to improve the method of computing the amount of
Platform: | Size: 791552 | Author: lvxiaobing | Hits:

[VHDL-FPGA-VerilogCSDmultiplier

Description: Code for CSD Multiplier
Platform: | Size: 1024 | Author: yuvi | Hits:

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