Search - CSD vhdl

[VHDL-FPGA-Verilog] FPGArealiztionofdigitalsignalprocessing

Description: 数字信号处理FPGA实现实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件 csd.exe --- 寻找整数和分数的标准有符号数字量（canonical signed digit ，CSD）表达式程序 fpinv.exe --- 倒数计算浮点数表的程序 dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHDL代码的程序 cic.exe ---CIC滤波器计算参数的程序 -Digital Signal Processing FPGA realization of practical procedures and documents, there are sine.exe--- input width. Sine wave output of the corresponding csd.exe--- Table mif file to find the integer and fractional number of the volume of standard symbols (canonical signed digit, CSD) Expression Programming fpinv.exe--- countdown procedures for calculation of floating-point form dagen.exe--- documents distributed algorithm to generate HDL " onclick =" tagshow (event) " class =" t_tag " > VHDL program code cic.exe--- CIC filter process parameters
Platform: | Size: 260096 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] filter1

Description: 题为基于CSD编码的FIR数字滤波器设计.该滤波器具有线性相位,系数减半.采用VHDL语言编写.是我们EDA课程的作业,得了优.希望对大家有用-Entitled based on CSD code FIR digital filter design. That the filters have linear phase, coefficient half. Using VHDL language. Is the EDA program operations, got excellent. Hope it would be useful
Platform: | Size: 13312 | Author: 万勇 | Hits:

[VHDL-FPGA-Verilog] 20FIRfilterwithCSD

Description: 20阶FIR滤波器，用CSD编码对参数进行了设计-20-order FIR filter with CSD coding of the design parameters
Platform: | Size: 3072 | Author: zhuhui | Hits:

[VHDL-FPGA-Verilog] CSDmultiplier

Description: Code for CSD Multiplier
Platform: | Size: 1024 | Author: yuvi | Hits:

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[VHDL-FPGA-Verilog] FPGArealiztionofdigitalsignalprocessing

[VHDL-FPGA-Verilog] filter1

[VHDL-FPGA-Verilog] 20FIRfilterwithCSD

[VHDL-FPGA-Verilog] CSDmultiplier

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