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[Other resource] Coder_8_3

Description: 用verilog HDL实现了83编码器.
Platform: | Size: 82805 | Author: zhuangqi | Hits:

[VHDL-FPGA-Verilog] Coder_8_3

Description: 用verilog HDL实现了83编码器.-Verilog HDL achieved with 83 encoders.
Platform: | Size: 82944 | Author: zhuangqi | Hits:

[VHDL-FPGA-Verilog] coder_8_3

Description: 8 - 3 线 优 先 编 码 器 。高电平有效，高位到低位置位。高位优先级高于低位-8 3 line priority encoder. Active high, high to low bit. High priority than low
Platform: | Size: 1024 | Author: 赵鹏 | Hits:

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