Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - DA verilog

Search list

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[SCM] AD_DA

Description: 非常好的,能够实现ad-da转换的子程序-Very good, to realize ad-da conversion subroutine
Platform: | Size: 5189632 | Author: 汪海燕 | Hits:

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[VHDL-FPGA-Verilog] hbf-da-timeshare

Description: This an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
Platform: | Size: 22528 | Author: | Hits:

[VHDL-FPGA-Verilog] 16_FIR

Description: 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
Platform: | Size: 799744 | Author: yuming | Hits:

[VHDL-FPGA-Verilog] high_speed_tap8_DDS

Description: 用verilog编写的高速8路并行dds模块，用于与高速da(1ghz或以上)接口产生任意频率正弦波，模块已经经过工程验证，用于产品中。-Verilog prepared with high-speed 8-way parallel dds modules for use with high-speed da (1ghz or above) interface have any frequency sine wave, the module has been proof for the products.
Platform: | Size: 5120 | Author: yangyu | Hits:

[VHDL-FPGA-Verilog] tlc5615

Description: TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
Platform: | Size: 317440 | Author: 田文军 | Hits:

[VHDL-FPGA-Verilog] THS5651_TEST

Description: THS5651是一款高速DA转换器，最高转换频率可到达100MBPS，该程序利用VHDL语言对THS5651进行控制-THS5651 is a high-speed DA converter, the maximum conversion frequency can be arrived at 100MBPS, the use of VHDL language in the process control of the THS5651
Platform: | Size: 1645568 | Author: 陈宇 | Hits:

[VHDL-FPGA-Verilog] verilog.DA.FIR..

Description: 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
Platform: | Size: 576512 | Author: 代鑫 | Hits:

[VHDL-FPGA-Verilog] test_in

Description: 用Verilog编写的产生图像的程序，实现24位数据量产生图像使用DA转换后直接显示-Verilog prepared using the procedure for selecting the images to achieve 24-bit image data generated using the DA converter and directly show the
Platform: | Size: 1024 | Author: lvxingli | Hits:

[VHDL-FPGA-Verilog] DA

Description: FPGA控制DAC2807的源文件，Verilog。附有简单文档-FPGA control DAC2807 source, Verilog. A simple document
Platform: | Size: 1629184 | Author: 柴佳 | Hits:

[VHDL-FPGA-Verilog] dac121

Description: 采用verilog编写的高速串型DA芯片dac121驱动代码，占用le较少，效率高，目前我应用在较多产品上-Verilog prepared using high-speed string-type DA-chip dac121 driver code, occupation le small, high efficiency, the current I applied to more products
Platform: | Size: 344064 | Author: chenwl | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

[VHDL-FPGA-Verilog] DA

Description: 采用Verilog在FPGA上实现一阶Σ-Δ DAC，仿真和实际验证都正确，基本可以达到16位DAC的信噪比
Platform: | Size: 15360 | Author: 陈阳 | Hits:

[Com Port] serial_adda

Description: 硬件语言描述串行DA和AD转换，FPGA控制。能够很好的实现高精度的模数数模转换-verilog description of the serial DA and AD conversion, FPGA control.
Platform: | Size: 2048 | Author: 杨明 | Hits:

[Software Engineering] DAC

Description: 主要实现对DA转换器的控制、调试程序，使用Verilog语言实现其功能-Main achieved control of the DA converter, debugger, use the Verilog language function
Platform: | Size: 135168 | Author: 王冠华 | Hits:

[VHDL-FPGA-Verilog] DA

Description: Verilog HDL　写的１２位串口ＤＡ转换程序-Written in Verilog HDL conversion process 12-bit serial DA
Platform: | Size: 684032 | Author: xiong | Hits:

[VHDL-FPGA-Verilog] DAC8812

Description: DA转换，Verilog HDL 编的，可实现DA转化。DA芯片用的是DAC8812，实现16位数模转化。-DA conversion, Verilog HDL code, the DA conversion can be achieved. DA-chip using a DAC8812, 16-bit analog-to achieve transformation.
Platform: | Size: 674816 | Author: jackosn | Hits:

[VHDL-FPGA-Verilog] Verilog-hdlFPGA

Description: 关于FPGA的提高篇，Verilog HDL语言写的， 包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classic procedure
Platform: | Size: 1181696 | Author: chenfeihu | Hits:

[VHDL-FPGA-Verilog] my6

Description: fpga verilog程序，实现诸多模块功能，包括，数码管显示，与ad，da通信，与mcu通信，以便通过mcu将高速ad值显示在lcd显示器上。-fpga verilog program to achieve a number of modules, including, digital display, with the ad, da communication, communication with mcu, mcu high-speed through the ad to the value displayed on the lcd display.
Platform: | Size: 3620864 | Author: liu | Hits:
« 12 3 4 »

CodeBus www.codebus.net