Search - DA vhdl

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[VHDL-FPGA-Verilog] vhdl程序例子 DL : 0: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Update : 2025-02-17 Size : 165kb Publisher : 王力
[Embeded-SCM Develop] adda_spi DL : 0: 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序，通过spi 核控制AD、DA的时序，实现正弦波发送和接收-this source is altera company development tools NIOS II IDE- based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetables to achieve sine sending and receiving
Update : 2025-02-17 Size : 65kb Publisher : zeng xuan
[Other] VHDL_and_FPGA_design DL : 0: 本书的)4一个持色是从FPGA设计的角度出发．别祈了vHD巳语法的特点以及它们的正确使用方沈，将初学者在运用vHDL语吉进行FPrjA设计中会遇到的疑惑，— 点拨清楚。并纪合作者的多年FPGA设计经验，讲述厂许多EDA设计思想v并贯穿全书始终。 -the book) with a four color from the FPGA design point of view. Other vHD already have a prayer of the characteristics of grammar and the correct use of them, Shen Fang, beginners in the use of the phrase Kyrgyzstan vHDL for FPrjA design encounter puzzled-Inspiration clear. SUMMARY collaborators and FPGA design experience for many years, on many plants v EDA design ideas and has always run through the whole book.
Update : 2025-02-17 Size : 7.61mb Publisher : haopowan
[Communication-Mobile] GetRomData DL : 0: 生成4种方式的DDS输出的读表程序的VHDL源代码程序。-four ways generation of DDS output of the meter reading procedures VHDL source code procedures.
Update : 2025-02-17 Size : 172kb Publisher : zhao
[VHDL-FPGA-Verilog] DAC0832 DL : 0: 由VHDL 语言实现的DA0832器利用的是QUARTUES环境已经得到验证-By the VHDL language uses the DA0832 is QUARTUES environment has been tested
Update : 2025-02-17 Size : 169kb Publisher : df
[MiddleWare] da8 DL : 0: TLV5628 8位da的vhdl控制程序，以验证-TLV5628 8 bit da the VHDL control procedures to verify
Update : 2025-02-17 Size : 1kb Publisher : gcy
[VxWorks] 44b0basic DL : 0: 44b0/linux环境基本实验源码,包括helloworld,线程,串口,AD,DA,CAN总线,LED,电机,GPS,GPRS,键盘驱动等-Experimental 44b0/linux environmental source, including the helloworld, threading, serial, AD, DA, CAN bus, LED, motor, GPS, GPRS, keyboard-driven, etc.
Update : 2025-02-17 Size : 1.61mb Publisher : 打火石
[Linux-Unix] digit DL : 0: 数字电压计是个实验例子，她使用FPGA开发板的AD、DA接口开发的数字电压表-Digital voltage is an experimental example of her use of FPGA development board of AD, DA interface developed digital voltage meter
Update : 2025-02-17 Size : 10kb Publisher : suoguang
[VHDL-FPGA-Verilog] EDAdeisgn(2) DL : 0: 该文件中是关于一些VHDL许多编程实例以及源码分析，希望对VHDL爱好者有用。卷2实例包括：多路彩灯控制器的设计与分析、智力抢器的设计与分析、微波炉控制器、数据采集控制系统、电梯控制器的设计与分析-The document is on a number of VHDL source code in many programming examples and analysis, in the hope that useful VHDL enthusiasts. Volume 2 Examples include: multi-way lantern controller design and analysis, intelligence steal the design and analysis, microwave oven controller, data acquisition and control systems, elevator controller design and analysis
Update : 2025-02-17 Size : 4.72mb Publisher : shengm1
[VHDL-FPGA-Verilog] ADcaiyang DL : 0: A/D采样控制模块设计 A/D采样控制模块负责控制外部ADC0809芯片多路模拟输入量的选通以及实现对A/D采样过程的合理控制。此部分的设计根据《EDA技术与VHDL》P211——P212的例8-2编写，所不同的是这里将书中“ADDA<=1”的赋值语句改为“ADDA <=EN”，EN是所设置的输入按键用来控制INO与IN1间的通道选择。 -A/D sampling control module designed A/D sampling control modules responsible for controlling external ADC0809 chip multi-channel analog input, as well as the amount of strobe to achieve A/D sampling the reasonable control of the process. This part of the design under the EDA technology and VHDL P211- P212 preparation of the cases of 8-2, the difference is that here the book ADDA <= 1 of the assignment changed to ADDA <= EN , EN is the set of input buttons used to control between INO and IN1 channel selection.
Update : 2025-02-17 Size : 1kb Publisher : xuye
[File Format] ram_da DL : 0: 将AD转换得到的八位数据存入RAM，存1000个点，然后通过串行DA读出，DA芯片为TLV5638,AD芯片为tlc0820ac，RAM为FM25L16-AD conversion will be the eight data into RAM, keep 1000 points, and then read out through the DA serial, DA chips for the TLV5638, AD chips for tlc0820ac, RAM for FM25L16
Update : 2025-02-17 Size : 635kb Publisher : 王力
[MiddleWare] da DL : 0: 实现da转换功能，不是很强大。。。还望多多指正-Realize da conversion feature, not very powerful. . . Also look a lot correction
Update : 2025-02-17 Size : 56kb Publisher : 小超
[Books] da DL : 0: 一个8位da转换程序，希望对广大新手有所帮助。
Update : 2025-02-17 Size : 1kb Publisher : tian
[VHDL-FPGA-Verilog] EDA DL : 0: 福州大学EDA实验代码,其中包含电子琴,DA转换器,时钟显示器等-Fuzhou University EDA experimental code, which includes electric, DA converters, clock display, etc.
Update : 2025-02-17 Size : 18kb Publisher : ARTHUR
[Embeded-SCM Develop] ARM3000 DL : 0: 博创ARM3000原理图，以及最小系统，包括AD,DA,LCD,键盘，以及常用外围设备-ARM3000 Fiberxon schematics, as well as the smallest system, including AD, DA, LCD, keyboard, and peripheral equipment used
Update : 2025-02-17 Size : 1.02mb Publisher : fiendboy1025
[VHDL-FPGA-Verilog] 6tapFIR DL : 0: 6阶FIR+verliog+分布式算法（DA）-6 bands FIR+ Verliog+ Distributed Arithmetic (DA)
Update : 2025-02-17 Size : 2kb Publisher : zs
[VHDL-FPGA-Verilog] DA DL : 0: 利用可编程逻辑器件进行D/A和A/D控制接口的设计 -The use of programmable logic device to carry out D/A and A/D control interface design
Update : 2025-02-17 Size : 12.93mb Publisher : 帅哥
[VHDL-FPGA-Verilog] Signal DL : 0: yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.
Update : 2025-02-17 Size : 1007kb Publisher : zxw
[VHDL-FPGA-Verilog] DA DL : 0: FPGA控制DAC2807的源文件，Verilog。附有简单文档-FPGA control DAC2807 source, Verilog. A simple document
Update : 2025-02-17 Size : 1.55mb Publisher : 柴佳
[VHDL-FPGA-Verilog] ADPCM DL : 0: APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
Update : 2025-02-17 Size : 1.27mb Publisher : jiajunxian

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