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[VHDL-FPGA-Verilog] two_d_dct_serial

Description: altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
Platform: | Size: 24576 | Author: 猪猪 | Hits:

[2D Graphic] DCT_2D

Description: DCT_2D Transform 2D DCT变换-DCT_2D Transform 2D DCT
Platform: | Size: 1024 | Author: 刘曦 | Hits:

[Special Effects] DCT2-lele

Description: 利用蝶形算法类似于FFT，利用先行再列实现二维DCT。速度很快。包含反DCT的代码。-similar to the use of butterfly FFT algorithm, the first re-use of 2D DCT out. Very fast. Contain anti- DCT code.
Platform: | Size: 2048 | Author: yaoli | Hits:

[Special Effects] DCT

Description: 将一副256*256的灰度图像分成8*8的小图像块，然后进行dct变换-Will be a 256* 256 gray image is divided into 8* 8 small image blocks, and then proceed to DCT transform
Platform: | Size: 389120 | Author: 笨笨 | Hits:

[VHDL-FPGA-Verilog] dct

Description: 2维DCt源码，可以实现8乘8点数据的2维DCT变换 -2-D DCT-source, you can realize 8 x 8 data 2-D DCT transform
Platform: | Size: 5120 | Author: jz | Hits:

[Graph program] fast_block_dct

Description: Fast m-script implementation of Block-DCT ( 2-D DCT )
Platform: | Size: 2048 | Author: xj | Hits:

[Technology Management] dct

Description: Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
Platform: | Size: 78848 | Author: student | Hits:

[Software Engineering] dct-thesis

Description: Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
Platform: | Size: 494592 | Author: student | Hits:

[Software Engineering] dct2

Description: Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
Platform: | Size: 10240 | Author: student | Hits:

[VHDL-FPGA-Verilog] dct2

Description: 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
Platform: | Size: 418816 | Author: jyb | Hits:

[VHDL-FPGA-Verilog] projekt

Description: Dct 2d in vhdl + description -Dct 2d in vhdl+ description
Platform: | Size: 352256 | Author: asia | Hits:

[Software Engineering] cast_dct-a

Description: dct 2d algorithm description
Platform: | Size: 216064 | Author: asia | Hits:

[Special Effects] image

Description: 实现了2D的图像处理，关于图像的各种方式的DCT变换，以及反变换。-The realization of the 2D image processing, a variety of ways on the image of the DCT transform, and inverse transform.
Platform: | Size: 301056 | Author: 左小龙 | Hits:

[VHDL-FPGA-Verilog] xapp610

Description: Verilog code for 2D-DCT with detailed documentation.
Platform: | Size: 128000 | Author: whitestone | Hits:

[Compress-Decompress algrithms] DCT_2D

Description: 二维DCT，FPGA实现JPEG压缩中的二维DCT-dct
Platform: | Size: 3072 | Author: paladin | Hits:

[Compress-Decompress algrithms] test_dct

Description: 本程序是在VC++编译环境下，用纯C语言编写的2D-DCT变换，程序中用的是一个4*4的矩阵进行的变换，可以改为对一幅图像进行。运算结果正确，在Matlab中进行了检验，dct2()指令即进行DCT变换。有一定的参考价值。-This procedure is in VC++ compiler environment, written in pure C 2D-DCT transform, the program used is a 4 x 4 matrix for the transformation can be changed to an image. Computation result is correct, was tested in Matlab in, dct2 () command that is to DCT transform. Some reference value.
Platform: | Size: 1024 | Author: 浪飞人海 | Hits:

[VHDL-FPGA-Verilog] ch3_dct

Description: fpga dct变换，用以视频压缩和处理图像-fpga dct
Platform: | Size: 2048 | Author: guqiutao | Hits:

[VHDL-FPGA-Verilog] dct

Description: all ok...4 Dec 2009 ... In this method the 2-Dimensional DCT is obtained by taking two ... column-wise 1D DCT is ascertained which gives the 2D DCT of the data. ... The design is done in Verilog HDL and the simulation is done in Modelsim 6.3b.
Platform: | Size: 1024 | Author: haziq36 | Hits:

[VHDL-FPGA-Verilog] two_d_dct_serial

Description: Verilog codes for 2D Discrete Cosine Transform (DCT)
Platform: | Size: 37888 | Author: rajkumar | Hits:

[VHDL-FPGA-Verilog] dct

Description: JPEG Compression and Ethernet Communication on an FPGA
Platform: | Size: 44032 | Author: Dang Tien Dat | Hits:
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