Search - DCT verilog code

Search - DCT verilog code - List

[Windows Develop] dct_mac DL : 0: dct verilog code for image -Extra Verilog code for image
Update : 2008-10-13 Size : 1.87kb Publisher : zhang chi
[Compress-Decompress algrithms] jpeg_encoder DL : 0: 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining circuit
Update : 2025-02-17 Size : 25kb Publisher : 李寧
[VHDL-FPGA-Verilog] 20060412183015974 DL : 0: 是关于dct的Verilog HDL源代码和测试程序-on the Verilog HDL source code and testing procedures
Update : 2025-02-17 Size : 30kb Publisher : 凌风
[Windows Develop] dct_mac DL : 0: dct verilog code for image -Extra Verilog code for image
Update : 2025-02-17 Size : 2kb Publisher : zhang chi
[Compress-Decompress algrithms] 601792346200732319490634862 DL : 0: jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Update : 2025-02-17 Size : 5kb Publisher : wuguanying
[Special Effects] DCTofJPEG DL : 0: 用verilog代码写的JPEG压缩核心模块DCT变换之蝶形单元算法-verilog code written using JPEG compression core module DCT's butterfly modules algorithm
Update : 2025-02-17 Size : 1kb Publisher : 叶人杰
[Graph program] DCT-vhdl DL : 0: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Update : 2025-02-17 Size : 10kb Publisher : liujl
[VHDL-FPGA-Verilog] DCT DL : 0: 用verilog语言实现DCT编解码附有DCT的说明-Using Verilog language realize DCT codec with a description of DCT
Update : 2025-02-17 Size : 64kb Publisher : 周韧研
[VHDL-FPGA-Verilog] dct DL : 0: 离散余弦变换的verilog源代码，经过验证可实现-Discrete cosine transform of Verilog source code can be verified
Update : 2025-02-17 Size : 27kb Publisher : 罗伟
[VHDL-FPGA-Verilog] DCT_1D DL : 0: 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper-One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the
Update : 2025-02-17 Size : 53kb Publisher : 楚天
[SCM] dct_source_code DL : 0: DCT source code,verilog代码。有兴趣的可以参考下。-DCT source code, verilog code. Interested can refer to the next.
Update : 2025-02-17 Size : 26kb Publisher : 小步
[VHDL-FPGA-Verilog] 8x8DCT DL : 0: 8x8DCT verilog code 一次輸入8個點-8x8DCT verilog code once the importation of eight points
Update : 2025-02-17 Size : 8.03mb Publisher : Emuil
[VHDL-FPGA-Verilog] 8x8IDCT DL : 0: 8x8 iDCT verilog code 一次輸入八個點-8x8 iDCT verilog code once the importation of eight points
Update : 2025-02-17 Size : 7.92mb Publisher : Emuil
[VHDL-FPGA-Verilog] main_dct DL : 0: verilog code for dct
Update : 2025-02-17 Size : 2kb Publisher : dheeru
[VHDL-FPGA-Verilog] xapp610 DL : 0: Verilog code for 2D-DCT with detailed documentation.
Update : 2025-02-17 Size : 125kb Publisher : whitestone
[source in ebook] 63535312DCTofJPEG DL : 0: 用verilog代码实现JPEG压缩编码过程中的DCT模块，用移位加法实现了乘法-Verilog code using JPEG compression encoding process to achieve the DCT module, with the shift to achieve the multiplication addition
Update : 2025-02-17 Size : 2kb Publisher : jiang
[mpeg mp3] mpeg2_idct_hw DL : 0: 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
Update : 2025-02-17 Size : 10.3mb Publisher : 陳伯綸
[Compress-Decompress algrithms] DCTPROGRAM.ZIP DL : 0: it is verilog code for two dimentional dct
Update : 2025-02-17 Size : 18kb Publisher : suhu
[VHDL-FPGA-Verilog] DCT_IDCT DL : 0: verilog code for DCT and IDCT (JPEG)
Update : 2025-02-17 Size : 62kb Publisher : Dang Tien Dat
[VHDL-FPGA-Verilog] verilog dct DL : 0: 其使用模块的代码风格来编写，能够8点dct的转换(Its use of the module's code style to write, to 8 dct conversion)
Update : 2025-02-17 Size : 34kb Publisher : 未曾走远

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