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[Embeded-SCM Developverilog_FPGA_DDC

Description: 这是一个用verilog HDL实现的实现数字下变频的源代码。-This is a verilog HDL used to achieve the realization of digital down conversion of the source code.
Platform: | Size: 2790400 | Author: 王坤 | Hits:

[VHDL-FPGA-VerilogDDC_DUC

Description: 数字上下变频FPGA设计的详细介绍资料,还是中文的。很舍不得上传的哦。-FPGA digital down conversion design detailed information, or Chinese. Oh, very reluctant to upload.
Platform: | Size: 357376 | Author: 陈洁 | Hits:

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