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[OS program] ddr2 VHDL原代码

Description: ddr2的仿真代码
Platform: | Size: 833330 | Author: kabtechnology@126.com | Hits:

[Documents] DDR2介绍及基于FPGA的控制器设计

Description: DDR2介绍及基于FPGA的控制器设计
Platform: | Size: 499712 | Author: zhidongguo2009@163.com | Hits:

[Other] DDR2 spec

Description: DDR2 specfication for download
Platform: | Size: 1478801 | Author: hudsonzhan@163.com | Hits:

[Documents] sumsung ddr2 1G内存规格书

Description: sumsung ddr2 1G内存规格书
Platform: | Size: 725141 | Author: xinghuo165013 | Hits:

[DSP program] TMS320C6455 DDR2驱动例子(经测试可用)

Description: TMS320C6455 DDR2驱动例子
Platform: | Size: 9796 | Author: mchai2001@126.com | Hits:

Description: ddr2控制器一些源码，控制时序及怎样通过嵌入式cpu来进行控制的实例-ddr2 Controller some source code, and how to control the timing of embedded cpu passed to the control of the examples
Platform: | Size: 297984 | Author: | Hits:

[VHDL-FPGA-Verilog] xapp935

Description: ddr2 controller, verilog source code from xilinx
Platform: | Size: 347136 | Author: Hubert | Hits:

[Other] xapp858[1]

Description: XAPP858 - 利用 Virtex-5 FPGA 实现的高性能 DDR2 SDRAM 接口数据采集本应用指南描述了用于实现 667 Mbps（333 MHz）高性能 DDR2 SDRAM 接口的控制器和数据采集的技巧。本数据采集技巧使用了输入串行器/解串器（ISERDES）和输出串行器/解串器（OSERDES）的功能。-XAPP858-use Virtex-5 FPGA high-performance DDR2 SDRA M Interface Data Acquisition Guide describes the application for achieving 667 Mbps (333 MHz) high-performance DDR 2 SDRAM Interface controller and data acquisition techniques. The data collection techniques used serial input/Solution Series (ISERDES) and serial output/Solution Series (O Legacy) function.
Platform: | Size: 296960 | Author: mingming | Hits:

[Other] DDR2

Description: DDR2 标准，供大家参考使用，-DDR2 standard, for reference use, Thank you!!!
Platform: | Size: 2202624 | Author: huawei | Hits:

[Other Embeded program] Intel-IOP341-DDR2-memory-controller-initializtion.

Description: 可以基于本流程了解IOP Raid处理器在启动时对DDR2内存控制器的初始化。也可以以此了解其他片上系统的DDR2控制器的启动方法。-Understanding of this process can be based on IOP Raid processor at boot time on the DDR2 memory controller initialization. Can also be used to understand the other system-on-chip DDR2 controller start-up method.
Platform: | Size: 77824 | Author: youxiaoguang | Hits:

[VHDL-FPGA-Verilog] ddr2

Description: 基于Xilinx fpga的ddr2 控制器设计方法-Xilinx fpga-based controller design method of ddr2
Platform: | Size: 2793472 | Author: Zhao Bill | Hits:

[Compress-Decompress algrithms] ddr2

Description: 测试DDR2是否能够正确写读数据,往DDR2中写一段数据，然后再读出来与写的数据进行比较-test writing and reading ddr2 is good
Platform: | Size: 109568 | Author: JJW | Hits:

[SCM] DDR2

Description: DDR2仿真说明有图文，容易接受-DDR2 simulation illustrate the illustrations, easy to accept! ! ! !
Platform: | Size: 532480 | Author: kevin | Hits:

[DSP program] ddr2

Description: 德州仪器的C6455范例程序。外部存储器DDR2的使用例子。-TI' s C6455 sample program. Examples of external use of DDR2 memory.
Platform: | Size: 10240 | Author: Ji | Hits:

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[OS program] ddr2 VHDL原代码

[Documents] DDR2介绍及基于FPGA的控制器设计

[Other] DDR2 spec

[Documents] sumsung ddr2 1G内存规格书

[DSP program] TMS320C6455 DDR2驱动例子(经测试可用)

[Other] u26a_spice

[VHDL-FPGA-Verilog] xapp935

[Other] xapp858[1]

[Other] DDR2

[Other Embeded program] Intel-IOP341-DDR2-memory-controller-initializtion.

[VHDL-FPGA-Verilog] ddr2

[Compress-Decompress algrithms] ddr2

[SCM] DDR2

[DSP program] ddr2

[VHDL-FPGA-Verilog] The-Speedy-DDR2-Controller-

[VHDL-FPGA-Verilog] ~DDR2-Demonstration

[VHDL-FPGA-Verilog] ddr2

[Other] NTC-DDR2-1G-G-R21

[Documents] DDR2简明教程

[Documents] DDR2使用图文教程

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