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[Compress-Decompress algrithmsDDR2_sdram

Description: DDR2 的控制器,它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Platform: | Size: 966656 | Author: 李国 | Hits:

[VHDL-FPGA-Verilogddr2sdram_spartan3s700an.tar

Description: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Platform: | Size: 1488896 | Author: under | Hits:

[VHDL-FPGA-VerilogMicron_SDRAM_DDR2Simulation_model_Verilog

Description: DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme-DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
Platform: | Size: 20480 | Author: rar | Hits:

[VHDL-FPGA-VerilogXil3SD1800A_MIG_simplifiedUI_vlog_v92

Description: verilog 实现的spartan 3A dsp start kit DDR2 SDRAM 控制器-verilog achieved spartan 3A dsp start kit DDR2 SDRAM controller
Platform: | Size: 908288 | Author: ma yirong | Hits:

[VHDL-FPGA-Verilogc_xapp260

Description: xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案,同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用(从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口)设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Platform: | Size: 1123328 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilogc_xapp454

Description: 这是xilinx应用指南xapp454的中文版本。本应用指南说明与 Micron DDR2 SDRAM 器件连接时,Spartan™ -3 器件中 DDR2 SDRAM 存储器接口的实现。本文档先简单介绍了 DDR2 SDRAM 器件的特性,然后对 DDR2 SDRAM 存储器接口的实现进行了详细说明。-This is the xilinx application note xapp454 the Chinese version. This application note and the Micron DDR2 SDRAM device is connected, Spartan ™ -3 devices DDR2 SDRAM memory interface implementation. This document briefly describes the DDR2 SDRAM device features, and then the realization of DDR2 SDRAM memory interface is described in detail.
Platform: | Size: 217088 | Author: 陈阳 | Hits:

[VHDL-FPGA-VerilogAMBA

Description: 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
Platform: | Size: 209920 | Author: guoxiaojin | Hits:

[VHDL-FPGA-VerilogVerilog_module

Description: micron 1G内存条verilog模型,对应具体信号为MT8HTF12864HZ-800,内存颗粒为MT47H128M8CF-25-micron 1G DDR2 SDRAM verilog module
Platform: | Size: 34816 | Author: | Hits:

[VHDL-FPGA-VerilogFSM

Description: FPGA学习资料,新手入门资料,VERILOG- Micron SDRAM DDR2 Simulation model Verilog
Platform: | Size: 320512 | Author: liu | Hits:

[OtherMICRON_2048Mb_ddr2

Description: micron ddr2 sdram verilog model and documents
Platform: | Size: 2636800 | Author: jane | Hits:

[VHDL-FPGA-Verilogddr2_v5

Description: 基于FPGA v5的ddr2-sdram控制器的设计verilog-Based on FPGA v5 of ddr2-sdram controller design verilog
Platform: | Size: 13487104 | Author: 铁鹏涛 | Hits:

[source in ebookMICRON_2048Mb_ddr2

Description: MICRON DDR2 SDRAM芯片Verilog仿真模型以及器件编号说明
Platform: | Size: 8050688 | Author: townsxu | Hits:

[OtherDDR2Controller

Description: DDR2 SDRAM Control Verilog RTL Code
Platform: | Size: 312320 | Author: richman | Hits:

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