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[Other resourceruanjiansheji

Description: 本简易网络导纳分析仪以C8051F020为控制和数据处理核心,由正弦信号发生器模块、滤波和功率放大模块、I/V变换模块、导纳角测量模块、导纳模测量模块、键盘模块以及液晶显示模块组成。采用数字控制DDS芯片AD9851产生100Hz-10KHz正弦信号,经滤波和功率放大后驱动网络负载。从网络负载中提取被测量信号,输入到以真有效值转换集成芯片AD637为核心的电压和电流测量电路构成的导纳模测量模块中进行导纳模测量。导纳角测量模块是从导纳模测量模块中取电压和电流信号分别经过零比较后使用鉴相器对信号相位差测量。把上述的测量结果经单片机处理后用液晶显示。为了提高测量精度,将各部分电路的误差合理分配,使电路达到最佳测量效果。
Platform: | Size: 118313 | Author: 郭峰 | Hits:

[SCMruanjiansheji

Description: 本简易网络导纳分析仪以C8051F020为控制和数据处理核心,由正弦信号发生器模块、滤波和功率放大模块、I/V变换模块、导纳角测量模块、导纳模测量模块、键盘模块以及液晶显示模块组成。采用数字控制DDS芯片AD9851产生100Hz-10KHz正弦信号,经滤波和功率放大后驱动网络负载。从网络负载中提取被测量信号,输入到以真有效值转换集成芯片AD637为核心的电压和电流测量电路构成的导纳模测量模块中进行导纳模测量。导纳角测量模块是从导纳模测量模块中取电压和电流信号分别经过零比较后使用鉴相器对信号相位差测量。把上述的测量结果经单片机处理后用液晶显示。为了提高测量精度,将各部分电路的误差合理分配,使电路达到最佳测量效果。
Platform: | Size: 117760 | Author: 郭峰 | Hits:

[SCMsgs32

Description: Verlog HDL 写得一款32路方波发生器,例子是4路可以自己加,相位可调,频率可调,占空比可调。具体参见readme.doc.此处只提供了源码包含顶层模块sgs32.v 子模块dds.v和pll设置模块altp.v及波形驱动文件-Verlog HDL write a 32 square-wave generator, for example, is able to add 4-way, phase adjustable, adjustable frequency, adjustable duty cycle. See readme.doc. Here only provide a source module that contains the top-level sub-modules sgs32.v settings dds.v and pll module altp.v and waveform-driven document
Platform: | Size: 59392 | Author: TTHR | Hits:

[VHDL-FPGA-Verilogtop

Description: FPGA程序的top.v文件,主要实现DDS信号发生器功能,通过定时器,可简单实现输出幅值无极跳变-FPGA procedures top.v documents, the main function of DDS signal generator, through the timer can be simple to achieve the output amplitude wuji hopping
Platform: | Size: 2048 | Author: 陈剑 | Hits:

[VHDL-FPGA-VerilogDDSsheji

Description: 再发一个修改的完善的基于FPGA的DDS信号源实现方案-Recurrence of an amendment to improve the FPGA-based realization of the DDS signal source program
Platform: | Size: 259072 | Author: 张松松 | Hits:

[SCMad9910

Description: 单片机控制dds芯片ad9910的参考代码,适合初学者。-SCM control dds chip ad9910 reference code, suitable for beginners.
Platform: | Size: 1024 | Author: zhang | Hits:

[Software Engineeringad9954ysv

Description: AD9954: 400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer. IBIS model. The AD9954 is a direct digital synthesizer (DDS) that uses advanced technology, coupled with an internal high speed, high performance DAC to form a complete, digitally programmable, high frequency synthesizer capable of generating a frequency-agile analog output sinusoidal waveform at up to 160 MHz.-AD9954: 400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer. IBIS model. The AD9954 is a direct digital synthesizer (DDS) that uses advanced technology, coupled with an internal high speed, high performance DAC to form a complete, digitally programmable, high frequency synthesizer capable of generating a frequency-agile analog output sinusoidal waveform at up to 160 MHz.
Platform: | Size: 37888 | Author: extreemband | Hits:

[Software Engineeringad9910

Description: AD9910: 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer. IBIS model. The AD9910 is a direct digital synthesizer (DDS) featuring an integrated 14-bit DAC and supporting sample rates up to 1 GSPS.-AD9910: 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer. IBIS model. The AD9910 is a direct digital synthesizer (DDS) featuring an integrated 14-bit DAC and supporting sample rates up to 1 GSPS.
Platform: | Size: 13312 | Author: extreemband | Hits:

[File Formatwave2

Description: eda课程设计:dds信号发生器.vhd原理及过程-failed to translate
Platform: | Size: 55296 | Author: 大幅度 | Hits:

[VHDL-FPGA-VerilogDDS_Set

Description: AD9852,DDS芯片接收数据逻辑。(Verilog语言)-AD9852, DDS chips receive data logic. (Verilog language)
Platform: | Size: 1024 | Author: zhangwei | Hits:

[SCMAD9834

Description: AD9834是一款75 MHz、低功耗直接数字频率合成器(DDS),能产生高性能正弦波和三角波输出。它还具有一个片内比较器,可以提供用于产生时钟的方波。该器件在3 V时的功耗仅为20 mW,非常适合对功耗敏感的应用。这个就是驱动程序,有ASM和C两中语言写的。谢谢大家。-The AD9834 is a 75 MHz, low-power direct digital frequency synthesis (DDS), can produce high-performance sine wave and triangle wave output. It also has an on-chip comparator can be used to generate the square wave clock. The device is only 20 mW at 3 V power consumption is ideal for power sensitive applications.This is the driver, written in ASM and C language.Thank you.
Platform: | Size: 4096 | Author: 骆丙漂 | Hits:

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