Search - DE0-SDRAM

[VHDL-FPGA-Verilog] de0_epcs_led

Description: de0的采用epcs sdram 搭建的最小系统点亮led等-de0 with epcs the sdram to build the smallest and the system light led
Platform: | Size: 17060404 | Author: 周 | Hits:

[VHDL-FPGA-Verilog] DE0_SDRAM

Description: DE0开发板SDRAM测试程序，10为拨码开关作为数据写入SDRAM中存储，在读出用7段数码管显示-ALTERA DE0 SDRAM
Platform: | Size: 7825408 | Author: 柳春青 | Hits:

Description: 基于友晶DE0开发板做的NiosII最小系统，主要是修正了开发板上闪存连线错误，已经测试过，烧到DE0里面就直接可以跑了。SDRAM和FLASH存储器都可以正常运行，里面还有一个用于点亮LED的小程序，是用软核实现的，从而证明该最小系统可以正常运行，其余的扩展可以自行开发-Friends of grain-based development board to do NiosII DE0 minimum system, mainly Fixed connection error on the development board flash memory has been tested, SDRAM and FLASH memory can be normal operation, there is also a small program for LED lighting, soft-core implementation is to prove that the minimum system functions properly, the rest of the extensions can be developed
Platform: | Size: 17147904 | Author: 周磊 | Hits:

[VHDL-FPGA-Verilog] de0_epcs_led

Description: de0的采用epcs sdram 搭建的最小系统点亮led等-de0 with epcs the sdram to build the smallest and the system light led
Platform: | Size: 17060864 | Author: 周 | Hits:

[VHDL-FPGA-Verilog] Using_the_SDRAM_on_DE0_Board

Description: Using the SDRAM on Altera’s DE0 Board with VHDL Designs
Platform: | Size: 1879040 | Author: sanya | Hits:

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[VHDL-FPGA-Verilog] de0_epcs_led

[VHDL-FPGA-Verilog] DE0_SDRAM

[VHDL-FPGA-Verilog] mysopc

[VHDL-FPGA-Verilog] de0_epcs_led

[VHDL-FPGA-Verilog] Using_the_SDRAM_on_DE0_Board

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