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[VHDL-FPGA-VerilogDE0_SDRAM

Description: DE0开发板SDRAM测试程序,10为拨码开关作为数据写入SDRAM中存储,在读出用7段数码管显示-ALTERA DE0 SDRAM
Platform: | Size: 7825408 | Author: 柳春青 | Hits:

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