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[VHDL-FPGA-Verilog] VGA_Ctrl

Description: 基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to write a response to Avalon from the CPU ports of the control signal, and then control the operation of the entire module,
Platform: | Size: 1024 | Author: 黄涛 | Hits:

[VHDL-FPGA-Verilog] DE1_pin_assignments_TFT_NEC6446

Description: de1 assignments for nec6446 tft vga display
Platform: | Size: 2048 | Author: de1_burn | Hits:

[VHDL-FPGA-Verilog] DE1_NIOS

Description: 用DE1试验箱实现的VGA调试程序，效果不错，分享下！-Chamber to achieve the VGA with DE1 debugger, well, sharing the next!
Platform: | Size: 2337792 | Author: Dobin | Hits:

[VHDL-FPGA-Verilog] DE1-Practice-VGA-display-

Description: 用altera的fpga设计的DE1开发板作为硬件平台实现VGA显示，verilog实现的，8种色彩，作为fpga驱动vga液晶的入门。DE1实践之VGA显示（8bit色彩）-Altera fpga design with the DE1 board as a hardware platform development VGA display, verilog implementation, 8 colors, as the introduction to fpga driver vga LCD--- DE1 Practice VGA display (8bit color)
Platform: | Size: 13312 | Author: wuwei | Hits:

[VHDL-FPGA-Verilog] de1_t1

Description: DE1的LED流水灯，数码管显示，可修改参数完成自定义的显示，有UART串口通信代码，VGA信号显示图片。-DE1 of the LED water lamp, LED display, you can modify the parameters to complete a custom show that UART serial communication code, VGA signal display pictures.
Platform: | Size: 38280192 | Author: guowei | Hits:

[VHDL-FPGA-Verilog] vga-example

Description: Basic VGA implementation on the Altera DE1
Platform: | Size: 660480 | Author: copheks | Hits:

[VHDL-FPGA-Verilog] vga_verilog

Description: 在DE1-SOC上运行的verilog HDL代码，可以驱动VGA显示彩条。quartus II 14.0可以直接使用-Verilog HDL code running on DE1-SOC, can drive VGA display color bars. quartus II 14.0 can be used directly
Platform: | Size: 13911040 | Author: xuedong wang | Hits:

[VHDL-FPGA-Verilog] ping_pong2LED

Description: 用QuartusII13.0软件，DE1开发板，支持VGA的显示屏实现的乒乓球游戏，同时可实现七段数码管计分，球碰撞声等功能-With QuartusII13.0 software, DE1 development board that supports VGA screen realization of table tennis game, while achieving seven-segment LED scoring, ball impact sound, and other functions
Platform: | Size: 6564864 | Author: 陈正鑫 | Hits:

[VHDL-FPGA-Verilog] digital_lock_vga_display

Description: Altera DE1平台的数字密码锁设计，可以驱动VGA显示(Altera DE1 platform digital password lock design, can drive VGA display)
Platform: | Size: 17898496 | Author: SDUGNN | Hits:

[VHDL-FPGA-Verilog] CAR_LI2

Description: DE1-SOC实验开发板和Verilog HDL语言的交互式程序作品，选择避障小车作为课程设计题目，并根据选题制定了如下设计需求： 1.能实现基本的避障小车功能，即躲避障碍，变速，计分，计时显示游戏开始、进行和结束画面； 2.能实现人机交互功能，玩家可通过外接键盘或DE1-SOC开发板自带按键和开关操作小车转向； 3.能通过VGA在显示屏中显示，并且能达到5Hz的刷新频率； 4.能实现自定义小车和障碍物皮肤的功能；(DE1-SOC experiment development board and Verilog HDL language interactive program works. Our group chooses obstacle avoidance car as curriculum design topic, and according to the selected topic, we have designed the following design requirements. 1. can achieve the basic obstacle avoidance car function, that is to avoid obstacles, speed, score, timing display games start, carry out and end the picture; 2. can achieve human-computer interaction function, players can use the external keyboard or DE1-SOC development board to carry button and switch to operate the car. 3. can be displayed in the display screen by VGA, and can reach the refresh frequency of 5Hz. 4. can realize the function of the custom car and the obstacle skin.)
Platform: | Size: 21147648 | Author: Sven111 | Hits:

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