Search - DE2 verilog

Search - DE2 verilog - List

[Embeded-SCM Develop] DE2_NIOS_HOST_MOUSE_VGA DL : 0: 利用该源代码可以实现在DE2的板子上进行USB画笔的实验-use of the source code can be achieved in the board Dictyophora USB brush on the experiment
Update : 2025-02-17 Size : 1kb Publisher : 杨阿胡
[VHDL-FPGA-Verilog] DE2_Default DL : 0: DE2开发版的默认程序，verilog，里面对各个模块都进行了控制，而且程序非常规范，值得学习-DE2 development version of the default proceedings, verilog, inside of each module have been controlled and standardized procedures, it is worth learning
Update : 2025-02-17 Size : 3mb Publisher : 张伟
[VHDL-FPGA-Verilog] DE2_i2sound DL : 0: Verilog代码，适合于初学者进行学习，是基于DE2平台的代码。-Verilog code, suitable for beginners to learn, is based on the DE2 platform code.
Update : 2025-02-17 Size : 29kb Publisher : wang
[VHDL-FPGA-Verilog] DE2_Top DL : 0: Verilog代码，适合于初学者进行学习，是基于DE2平台的代码。-Verilog code, suitable for beginners to learn, is based on the DE2 platform code.
Update : 2025-02-17 Size : 21kb Publisher : wang
[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA DL : 0: Verilog代码，适合于初学者进行学习，是基于DE2平台的代码。-Verilog code, suitable for beginners to learn, is based on the DE2 platform code.
Update : 2025-02-17 Size : 11kb Publisher : wang
[VHDL-FPGA-Verilog] DE2_NIOS_DEVICE_LED DL : 0: Verilog代码，适合于初学者进行学习，是基于DE2平台的代码。-Verilog code, suitable for beginners to learn, is based on the DE2 platform code.
Update : 2025-02-17 Size : 19kb Publisher : wang
[VHDL-FPGA-Verilog] DE2_SD_Card_Audio DL : 0: Verilog代码，适合于初学者进行学习，是基于DE2平台的代码。-Verilog code, suitable for beginners to learn, is based on the DE2 platform code.
Update : 2025-02-17 Size : 8kb Publisher : wang
[VHDL-FPGA-Verilog] sdram_0 DL : 0: SDRAM的Verilog HDL程序，适合DE2开发板，和TRDB-LCM显示器，很好哦-SDRAM procedures of the Verilog HDL for DE2 development board, and TRDB-LCM display, oh well
Update : 2025-02-17 Size : 4kb Publisher : 白雪
[VHDL-FPGA-Verilog] DE2_SD_Card_Audio DL : 0: SD卡读取音频数据，由VGA显示。Verilog HDL语言编写，适用DE2实验箱-SD card reader audio data from the VGA display. Verilog HDL language, the application of the experimental box DE2
Update : 2025-02-17 Size : 3kb Publisher : 白雪
[VHDL-FPGA-Verilog] DE2_LCM_Num DL : 0: 基於DE2系統的LCM verilog code,在LCM右下方顯示數字,每按一次按鍵數字會加1,顏色也會改變-Based on the DE2 System LCM verilog code, in the lower right corner shows the number of LCM, every time key figures will be one color may also be changed
Update : 2025-02-17 Size : 1.04mb Publisher : Emuil
[VHDL-FPGA-Verilog] DE2_WEB DL : 1: 用DE2板子实现的音频分析器,需要安装quartus2,硬件需要DE2的板子-DE2 board using the Audio Analyzer realize the need to install quartus2, the hardware needs of the DE2 board
Update : 2025-02-17 Size : 8.23mb Publisher : 任迎
[VHDL-FPGA-Verilog] Cursor DL : 0: ALTERA的DE2平台VGA接口应用，由KEY0－KEY3控制上下左右，使屏幕上光标移动，由Verilog描述。-ALTERA the DE2 platform VGA interface applications, from top to bottom KEY0-KEY3 about control, so that the screen cursor by the Verilog description.
Update : 2025-02-17 Size : 761kb Publisher : 徐朝凯
[VHDL-FPGA-Verilog] Traffic DL : 0: 使用ALTERA上DE2平台，使用Verilog描述，交通灯控制。-Using ALTERA on DE2 platform, use the Verilog description of the traffic light control.
Update : 2025-02-17 Size : 257kb Publisher : 徐朝凯
[2D Graphic] DE2_CCD_binary DL : 0: verilog DE2 binary image (form CCD to VGA) output
Update : 2025-02-17 Size : 4.04mb Publisher : eknngx
[Graph program] vga DL : 0: 基于DE2板子的，VGA 图像显示，采用verilog语言-Based on the DE2 board, VGA image display, using Verilog language
Update : 2025-02-17 Size : 1kb Publisher : 张梦
[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA DL : 0: 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in Nios2. The DE2 board and display can be used to connect the keyboard.
Update : 2025-02-17 Size : 1.55mb Publisher : 符玉襄
[VHDL-FPGA-Verilog] DE2_SDCARD DL : 0: DE2 开发板上，NIOS编程。对SD卡以及USB的读写操作的实例。我的代码及工程绝对完整！代码其实是Verilog编写的。-DE2 development board, NIOS programming. On the SD card and USB examples of read and write operations. My absolute integrity of code and works! Verilog code is written.
Update : 2025-02-17 Size : 11.3mb Publisher : jiayanfu
[VHDL-FPGA-Verilog] Sdram_Control_2Port DL : 0: 双端口SDRAM控制器，将SDRAM虚拟成两个端口，已经在ALTER DE2开发板的硬件上验证通过，采用Verilog HDL语言编写。-Dual-port SDRAM controller, SDRAM virtual into two ports, have ALTER DE2 development board hardware verification by using the Verilog HDL language.
Update : 2025-02-17 Size : 11kb Publisher :
[VHDL-FPGA-Verilog] DE2_70_AUDIO DL : 0: 是用VERILOG HDL和NIOS II C/C++ 编的DE2-70板子的音频编解码芯片的使用工程-Is VERILOG HDL and NIOS II C/C++ code of the DE2-70 board in the audio codec chip, the use of project
Update : 2025-02-17 Size : 20.57mb Publisher : 覃建策
[VHDL-FPGA-Verilog] DE2-VGA-LED DL : 0: verilog HDL 语言编写的，FPGA的数码管和VGA的显示。调用时不必修改源码，只需引脚映射对就可以-verilog HDL language, FPGA digital and VGA display. Call without having to modify source code, you can just pin on the map
Update : 2025-02-17 Size : 5.53mb Publisher :

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