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Description: Wishbone dma ip core
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Size: 7168 |
Author: liwen |
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Description: 三段式Verilog的IDE程序,但只有DMA部分,需要自己添加PIO的代码-Verilog three-step procedure of the IDE, but only parts of DMA, PIO required to add their own code
Platform: |
Size: 2048 |
Author: wang |
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