Search - DMA verilog

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[Other resource] cpci1 DL : 0: 针对多DSP 共享总线的通用信号处理板卡, 介绍了基于PCI9054 和CPCI 总线的接口设计, 分析了通用WDM总线驱动程序的开发。采用Verilog HDL 用CPLD 设计控制时序实现了DSP 和 CPCI 总线桥接器PCI9054 之间的普通传输和高速DMA 传输。驱动程序采用DriverWorks 和Windows 驱动开发包DDK 进行开发, 具有很好的通用性和可移植性。
Update : 2008-10-13 Size : 218.43kb Publisher : 都上课
[VHDL-FPGA-Verilog] adma DL : 0: Wishbone dma ip core
Update : 2025-02-17 Size : 7kb Publisher : liwen
[VHDL-FPGA-Verilog] ocidec3_IDE_controller DL : 0: 硬盘控制器VHDL源代码，实现了PIO和DMA方式，请支持-hard disk controller VHDL source code and realized the PIO and DMA mode, please support
Update : 2025-02-17 Size : 38kb Publisher : 磊
[DSP program] cpci1 DL : 0: 针对多DSP 共享总线的通用信号处理板卡, 介绍了基于PCI9054 和CPCI 总线的接口设计, 分析了通用WDM总线驱动程序的开发。采用Verilog HDL 用CPLD 设计控制时序实现了DSP 和 CPCI 总线桥接器PCI9054 之间的普通传输和高速DMA 传输。驱动程序采用DriverWorks 和Windows 驱动开发包DDK 进行开发, 具有很好的通用性和可移植性。-err
Update : 2025-02-17 Size : 218kb Publisher : 都上课
[VHDL-FPGA-Verilog] VGAVGA DL : 0: 利用VERILOG编写的基于XILINX的SPARTAN板的VGA接口显示程序-Verilog prepared using the SPARTAN-based XILINX board VGA Interface display program
Update : 2025-02-17 Size : 2mb Publisher : leestar
[VHDL-FPGA-Verilog] NIOSII_tutorial_code DL : 0: NIOSII实例代码。包括系统时钟代码，DMA(Memory to Memory)驱动代码，Fine-gained Flash Access驱动代码,Timestamp驱动代码,ISR代码，Simple Flash Access驱动代码，UART代码-NIOSII examples of code. Including the system clock source, DMA (Memory to Memory) drive code, Fine-gained Flash Access driver code, Timestamp-driven code, ISR code, Simple Flash Access driver code, UART code
Update : 2025-02-17 Size : 8kb Publisher : danielmu
[Windows Develop] DMA DL : 0: DMA与DMA控制器，讲解了DMA(Direct Memory Access)的概念以及DMA系统组成及工作过程 -DMA and the DMA controller, on a DMA (Direct Memory Access) and DMA system the concept of the composition and the working process
Update : 2025-02-17 Size : 25kb Publisher : godname
[Software Engineering] dma DL : 0: DMA调试经验，NIOS II环境下，适用altera公司芯片-DMA debugging experience, NIOS II environment, the application of altera-chip companies
Update : 2025-02-17 Size : 1kb Publisher : yeyoushi
[VHDL-FPGA-Verilog] ide_control DL : 0: 三段式Verilog的IDE程序，但只有DMA部分，需要自己添加PIO的代码-Verilog three-step procedure of the IDE, but only parts of DMA, PIO required to add their own code
Update : 2025-02-17 Size : 2kb Publisher : wang
[VHDL-FPGA-Verilog] DMA_8237A DL : 0: 经典DMA控制器8237A的VHDL设计，对设计DMA控制器有很高的参考价值。-Classic DMA controller 8237A of the VHDL design, the design of the DMA controller has a high reference value.
Update : 2025-02-17 Size : 12kb Publisher : neversee
[VHDL-FPGA-Verilog] UART_DMA DL : 0: 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
Update : 2025-02-17 Size : 10.82mb Publisher : 王超
[VHDL-FPGA-Verilog] 8dma_bridge DL : 0: 基于Verilog hdl 的DMA控制代码-Verilog hdl-based control of the DMA code
Update : 2025-02-17 Size : 33kb Publisher : wxd
[VHDL-FPGA-Verilog] TrackingPresentation_jon DL : 0: presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s
Update : 2025-02-17 Size : 1.44mb Publisher : stjohn
[VHDL-FPGA-Verilog] sdcard_mass_storage_controller_latest.tar DL : 0: 基于wishbone总线的SD Card IP Core,有Verilog和VHDL两种语言版本,包含了FIFO和DMA两种实现方式,是开源的IP Core-Based on the wishbone bus SD Card IP Core, there are two language versions of Verilog and VHDL, including the FIFO and DMA implemented in two ways, is open source IP Core
Update : 2025-02-17 Size : 2.17mb Publisher : 张亚群
[VHDL-FPGA-Verilog] dma_hussam DL : 0: verilog code for dma
Update : 2025-02-17 Size : 936kb Publisher : hussamkh
[VHDL-FPGA-Verilog] DMA-CORE DL : 0: simple verilog dma source
Update : 2025-02-17 Size : 7kb Publisher : dyded
[VHDL-FPGA-Verilog] dma_0 DL : 0: SOPC系统编译的DMA的Verilog代码-DMA IP core in SOPC
Update : 2025-02-17 Size : 5kb Publisher : zy
[VHDL-FPGA-Verilog] dma(including-driver).xapp1052 DL : 0: xilinx 官方dma 的verilog实现，包含windows和linux驱动。-XILINX s dma design of verilog ,including windows driver and linux driver .
Update : 2025-02-17 Size : 2.6mb Publisher : minitu
[VHDL-FPGA-Verilog] dma_ahb_latest.tar DL : 0: AHB DMA verilog源码 AHB总线 DMA接口源码(AHB bus DMA interface source code)
Update : 2025-02-17 Size : 646kb Publisher : 翾飞FEI
[VHDL-FPGA-Verilog] code DL : 0: 基于蜂鸟E203riscv系统的DMA外设代码(DMA code based on hbird_e203 system)
Update : 2025-02-17 Size : 6kb Publisher : 飞扬飘逸

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