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[Other resourceDW8051

Description: 大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持-famous Synopsys Core 8051IP the VHDL language, can be supported keilC51
Platform: | Size: 664972 | Author: 李无志 | Hits:

[VHDL-FPGA-VerilogDW8051

Description: 大名鼎鼎的Synopsys公司出的8051IP Core VHDL语言编写,能被keilC51支持-famous Synopsys Core 8051IP the VHDL language, can be supported keilC51
Platform: | Size: 664576 | Author: 李无志 | Hits:

[VHDL-FPGA-Verilog8051_nios_vhdl

Description: 8051 MCU在nois平台上的实现代码(VHDL),出自Altera公司,经过严格测试核验证-nois 8051 MCU platform in the realization of code (VHDL) from Altera Corporation, after strict verification of nuclear test
Platform: | Size: 102400 | Author: 钟方 | Hits:

[Other Embeded programDW8051_2

Description: DW8051 高速8051 IP Core, 本人測試過完全100% 正常.-DW8051 High-Speed 8051 IP Core, I tested 100 percent completely normal.
Platform: | Size: 67584 | Author: eddche | Hits:

[OtherDW8051_HDL

Description: DW8051 Verilog VHDL 源码和文档 -DW8051 Verilog VHDL Code and document
Platform: | Size: 4613120 | Author: haiwaw | Hits:

[VHDL-FPGA-VerilogDW8051_ALL

Description: 包中包括, DW8051完整的Verilog HDL代码 两本手册: DesignWare Library DW8051 MacroCell, Datasheet DesignWare DW8051 MacroCell Databook 三篇51论文: 基于IP 核的PSTN 短消息终端SoC 软硬件协同设计 Embedded TCP/ IP Chip Based on DW8051 Core 以8051为核的SOC中的万年历的设计 -DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!
Platform: | Size: 1588224 | Author: myfingerhurt | Hits:

[VHDL-FPGA-VerilogDW8051

Description: 一个兼容keil的8051内核,在Quartus II 8.0 上编译通过的。希望对大家有帮助-Keil a 8051-compatible core, the Quartus II 8.0, adopted by the compiler. We want to help! !
Platform: | Size: 4737024 | Author: 1987 | Hits:

[Embeded-SCM DevelopDW8051

Description: 8051Ip核内部ram。很多8051iP核都没有内部ram,上传一个希望对大家有用-internel ram of 8051Ip
Platform: | Size: 73728 | Author: 刘超 | Hits:

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