Search - EP1C6Q240C6

Search - EP1C6Q240C6 - List

[Other resource] cyclone DL : 0: AVR ATMEGA128和FPGA EP1C6Q240C6的开发板，功能强大。
Update : 2008-10-13 Size : 1.02mb Publisher : 文杰
[SCM] cyclone DL : 0: AVR ATMEGA128和FPGA EP1C6Q240C6的开发板，功能强大。-AVR ATMEGA128 and development board FPGA EP1C6Q240C6 and powerful.
Update : 2025-02-17 Size : 1.02mb Publisher : 文杰
[Other Embeded program] ALTERA DL : 0: 5款ALTERA FPGA开发板原理图合集。包括EP1C6Q240C6开发板原理图、Cyclone II EP2C20 原理图。希望对大家有用-5 ALTERA FPGA development board schematic diagram collection. Including EP1C6Q240C6 development board schematics, Cyclone II EP2C20 Schematic. I hope all of you a useful
Update : 2025-02-17 Size : 651kb Publisher : 傅佩龙
[Software Engineering] EP1C6Q240C6 DL : 0: EP1C6Q240C6开发板原理图，Altera公司的Cyclone系列FPGA—EP1C6Q240-EP1C6Q240C6 development board schematics, Altera' s Cyclone series FPGA-EP1C6Q240
Update : 2025-02-17 Size : 67kb Publisher : li
[VHDL-FPGA-Verilog] EP1C6Q240C6 DL : 0: altera EP1C6Q240C6开发板原理图-altera EP1C6Q240C6 SCH
Update : 2025-02-17 Size : 67kb Publisher : sct_sct
[Software Engineering] FPGA DL : 0: 针对MT9M111数字图像传感器,采用Cyclone系列 EP1C6Q240C6作为主控芯片,设计并实现了ITU-R BT.656视频数据的采集、色彩空间转换、DVI-I显示控制的数字视频转换系统。系统可以将传感器的输入图像以1280×960(60Hz)和 1280×1024(60Hz)格式输出到DVI-I显示器上,并具有图像静止功能,同时在系统空闲时,可以将系统设置为待机状态,来降低功耗。-Aimed at the digital image sensor MT9M111,used Cyclone EP1C6Q240C6 as the main control chip,designed and implemented the conversion system of the collection of the ITU-R BT.656 video data,color space conversion,and the display on DVI-I monitor.This system can display the image from the sensor on DVI-I monitor in the mode of 1280960(60 Hz)or 12801024(60 Hz),image freezing is also supported.Moreover,the system can be set into standby state when the system is idled,for low power consumption.
Update : 2025-02-17 Size : 550kb Publisher : 将建
[VHDL-FPGA-Verilog] EP1C6Q240C6 DL : 0: EP1C6Q240C6开发板原理图，自己做的FPJA 和大家分享一下-EP1C6Q240C6 development board schematics, myself and share with you the FPJA
Update : 2025-02-17 Size : 67kb Publisher : 万里
[Software Engineering] EP1C6Q240C6-sch DL : 0: EP1C6Q240C6开发板的原理图，对向自己做板子，或者以此芯片设计电路的人很高的参考价值。-EP1C6Q240C6 development board the schematic diagram, to his board to do, or by chip design the circuit high reference value.
Update : 2025-02-17 Size : 67kb Publisher : 刘琦
[VHDL-FPGA-Verilog] FULL-FPGA-SCH DL : 0: 包括Cyclone II EP2C20 原理图.CycloneII开发板原理图fpga.EP1C3T144 FPGA develop board manual.EP1C6Q240C6开发板原理图.EP2C8开发板原理图.EPM1270F256C5 MAX_II_board_schematics.SF-EP1V2+FPGA开发板原理图.XC3S400红色飓风开发板原理图.红色飓风II代开发板原理图2.-Including the Cyclone II EP2C20 schematic . CycloneII development board schematics fpga.EP1C3T144FPGA develop board manual.EP1C6Q240C6 development board schematic . EP2C8development board schematics . EPM1270F256C5MAX_II_board_schematics.SF-EP1V2+FPGA development board schematic . XC3S400red hurricane development board schematics. Red hurricane II development board schematic diagram2
Update : 2025-02-17 Size : 1.92mb Publisher : zgx