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Description: MAXII_DEV_BOARD EPM240的开发板电路图。-MAXII_DEV_BOARD EPM240 development board schematics.
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Size: 558080 |
Author: qqq |
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Description: BJ-EPM240V2实验例程以及说明文档实验之BJ-EPM整板测试用代码-BJ-EPM240V2 experimental test routines as well as documentation of the entire board BJ-EPM test code
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Size: 1349632 |
Author: 王建毅 |
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Description: 我买的EPM240开发板的原理图,共同分享-I bought EPM240 development board schematics to share
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Size: 29696 |
Author: 马磊 |
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Description: 本代码功能为实现VGA显示功能,即实现在显示器上显示640*480彩条。
程序通过quartusII 8.1编译,使用verilog语言编写。
可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。
(开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm)
有需要的朋友可以下载参考-The code functions to achieve the VGA display, that is, to achieve the display 640* 480 Color display. Procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
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Size: 47104 |
Author: 彬杰科技 |
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Description: 本代码功能为实现38/30KHZ红外线接收功能
程序通过quartusII 8.1编译,使用verilog语言编写。
可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。
(开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm)
有需要的朋友可以下载参考-The code functions to achieve 38/30KHZ infrared reception procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
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Size: 78848 |
Author: 彬杰科技 |
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Description: 本代码功能为实现接收PS2键盘编码功能。
程序通过quartusII 8.1编译,使用verilog语言编写。
可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。
(开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm)
有需要的朋友可以下载参考-The code functions to achieve the receiver PS2 keyboard encoding. Procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
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Size: 118784 |
Author: 彬杰科技 |
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Description: 本代码功能为实现接收PC发送的串口数据功能
程序通过quartusII 8.1编译,使用verilog语言编写。
可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。
(开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm)
有需要的朋友可以下载参考-The code functions to achieve the receiving PC to send serial data capabilities procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
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Size: 48128 |
Author: huangbin |
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Description: 本代码功能为实现输入时钟的1.5分频功能。
程序通过quartusII 8.1编译,使用verilog语言编写。
可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。
(开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm)
有需要的朋友可以下载参考-The code functions as the input clock frequency of 1.5 features. Procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
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Size: 28672 |
Author: huangbin |
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Description: 本范例的四大用途:
1.DDS AD9856的应用,敢说是国内首创,从原理图到PCB到源代码全部验证通过;
2.CPLD EPM240的学习板:典型的使用CPLD做高速数据采集(ADS825是40MSPS的ADC);
3.MSP430F149的学习板;
4.高速ADC与DDS联合应用的范例板 -The four purposes of this example: 1.DDS AD9856 application, say is the first, from the schematic to the PCB to the source code for all verified 2.CPLD EPM240 learning board: the use of CPLD to do the typical high-speed data acquisition (ADS825 is 40MSPS the ADC) 3.MSP430F149 learning board 4. high-speed ADC and DDS example of combined board
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Size: 4074496 |
Author: jike |
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Description: VGA的显示试验,这是在EPM240开发板上验证过的代码。-VGA display test, this is in the EPM240 development board validated code.
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Size: 1024 |
Author: 吴敬飞 |
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Description: 这是按键消抖试验,具有很好的可移植性。在EPM240开发板上验证过的-This is the key debounce test, with good portability. In the development board verified EPM240
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Size: 1024 |
Author: 吴敬飞 |
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Description: 这是PS2键盘解码试验,在EPM240开发板上验证过的-This is a PS2 keyboard decoder test, the development board verified EPM240
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Size: 1024 |
Author: 吴敬飞 |
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Description: 开发板配套教程里的很多个实验 方便从初学开始 含有VHDL和verilog HDL语言-Development board supporting the many tutorial easy experiments start from the beginner with the language VHDL and verilog HDL
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Size: 14445568 |
Author: menshen08 |
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Description: 这是基于BJ-EPM240学习开发板的串口通信实验程序-This study is based on BJ-EPM240 development board serial communication experiment program
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Size: 312320 |
Author: cpu |
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Description: EPM240开发板介绍,包括管脚情况,开发板器件结构布局,及相关配件.-The EPM240 Development Board, including pin development board device structure and layout, and related accessories.
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Size: 155648 |
Author: 高小百 |
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Description: 基于EPM240的入门实验拥有大量的实验历程完全可以学习掌握Verilog语言。-Based on the the EPM240 entry experiments have a large number of experimental course can learn to master the Verilog language.
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Size: 1527808 |
Author: gcy |
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Description: EPM240学习板,包括原理图和PCB,有需要的可以参考下。-EPM240 learning board, including schematics and PCB, there is a need to reference. DDDDDDDDDDDDDDDDDDDDDDDDDDD
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Size: 57344 |
Author: shape |
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Description: 基于EPM240开发板资料,配套示例程序VHDL语言。-EPM240 development board supporting sample program VHDL
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Size: 3691520 |
Author: 孙建云 |
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Description: EPM240-570开发板原理图,希望学习的同学下载下来参考一下,很好的学习文档。-EPM240-570 development board schematics, the students want to learn download reference, good learning documentation.
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Size: 61440 |
Author: lidong |
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Description: EPM240原理图 EASYCPLD,LYC-EDA(EPM240 hardware sch,EASYCPLD,LYC-EDA)
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Size: 338944 |
Author: 可爱狐狸
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