Search - ETHERNET phy

[PropertySheet] TSipPrto11

Description: IP2022内含全双工串化器/ 解串器（SER/DES），能直接与各种常用网络接口连接，可实现片内10BaseT以太网（MAC 和PHY）、USB以及其他各种快速串行协议。 -IP2022 Series of full-duplex intron/deserializer (SER/DES). all can be used directly with the network interface connector, can be realized on-chip 10BaseT Ethernet (MAC and PHY), USB and various other fast serial agreement.
Platform: | Size: 28672 | Author: Jee | Hits:

[SCM] MC9S12NE64V1[1]

Description: 带以太网的16位单片机资料，内带MAC和PHY-With 16 single-chip Ethernet data, with the band MAC and PHY
Platform: | Size: 1886208 | Author: 俞国良 | Hits:

[uCOS] Ethernet_DM9161A

Description: 以太网处理程序；基于lpc2378，PHY收发器使用DM9161A以及ucos-Ethernet treatment procedures based on the lpc2378, PHY transceivers, as well as the use of DM9161A uCOS
Platform: | Size: 243712 | Author: Julian | Hits:

[Internet-Network] mii

Description: 以太网PHY端口MII物理层收发程序，可作为开发参考-MII Ethernet PHY port physical layer transceiver procedures, can be used as the development of reference
Platform: | Size: 18432 | Author: re | Hits:

[Other] 88e1111

Description: 千兆网phy芯片资料-88e1111，费劲找到的-Phy chip Gigabit Ethernet data-88e1111, hard to find
Platform: | Size: 1585152 | Author: 菠菜 | Hits:

[Other] fpga_mac_vhdl

Description: 针对嵌入式系统的底层网络接口给出了一种由FPGA实现的以太网控制器的设计方法．该控制器能支持10Mbps和100Mbps的传输速率以及半双工和全双工模式，同时可提供MII接口，可并通过外接以太网物理层（PHY）芯片来实现网络接入 -Embedded systems for the bottom of this paper, a network interface from FPGA to achieve the Ethernet controller design method. The controller will support the 10Mbps and 100Mbps transfer rate, as well as half-duplex and full-duplex mode, at the same time provides MII interface, and through external Ethernet physical layer (PHY) chip to achieve network access
Platform: | Size: 316416 | Author: 林大朋 | Hits:

[ARM-PowerPC-ColdFire-MIPS] DM9000EP_Product_v1.0

Description: DM9000技術文件 ISA to Ethernet MAC Controller with Intergrated 10/100 PHY-DM9000 technical documents ISA to Ethernet MAC Controller with Intergrated 10/100 PHY
Platform: | Size: 33792 | Author: ndd28153 | Hits:

[Windows Develop] IntelDatatsheet

Description: The Intel? 82571EB Gigabit Ethernet Controller is a single, compact component with two full-integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) ports. The Intel 82571/82572 Gigabit Ethernet Controller is a single-port version of the controller in the same package. These devices use the PCI Express* architecture (Rev. 1.0a). The Intel 82571/82572 Gigabit Ethernet Controller enables dual- or singleport gigabit ethernet implementation in a very small area--ideal for both server and workstation network designs that have critical space constraints.-The Intel? 82571EB Gigabit Ethernet Controller is a single, compact component withtwo full-integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) ports. The Intel 82571/82572 Gigabit Ethernet Controller is a single-port versionof the controller in the same package. These devices use the PCI Express* architecture (Rev. 1.0a). The Intel 82571/82572 Gigabit Ethernet Controller enables dual-or singleportgigabit ethernet implementation in a very small area- ideal for both server andworkstation network designs that have critical space constraints.
Platform: | Size: 4814848 | Author: 黄子超 | Hits:

[Program doc] 88E1111

Description: 关于88E1111网络phy的详细的资料，对希望了解使用的人很有帮助-About 88E1111 network phy detailed information on the hope that people understand the use of helpful
Platform: | Size: 1087488 | Author: lipeng | Hits:

[VHDL-FPGA-Verilog] mdio-md

Description: 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理-At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA completed by the MII management
Platform: | Size: 2048 | Author: leon | Hits:

[Program doc] DP83861.ZIP

Description: National Semiconductor Ethernet Gigabit PHY DP83861.pdf
Platform: | Size: 705536 | Author: student | Hits:

[Program doc] DP83865.ZIP

Description: National Semiconductor Ethernet Gigabit PHY DP83865.pdf
Platform: | Size: 565248 | Author: student | Hits:

[ARM-PowerPC-ColdFire-MIPS] tmbslPhyKS8721

Description: 以太网PHY芯片KS8721驱动，从NXP Trimedia DSP开发包中提取出来的。可以参考。-Ethernet PHY chip KS8721 driver
Platform: | Size: 21504 | Author: zorro | Hits:

[Other] intit

Description: 初始化网络芯片，我负责的是MAC的初始化和PHY初始化。可以试着在此基础上编写以太网。-Initialize the network chip, I am responsible for the MAC and PHY initialization initialization. Can try to write on this basis Ethernet.
Platform: | Size: 2048 | Author: 张见平 | Hits:

[VHDL-FPGA-Verilog] m-mtip-10_100_1000_ethermac

Description: 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
Platform: | Size: 43008 | Author: 天一生水 | Hits:

[SCM] HP_Pavilion_DV2000_AMD_Series_

Description: HP Pavilion DV2000 notebook schematics. Contains schematic of Marvel 88E1116 ethernet PHY (hard to find).
Platform: | Size: 1195008 | Author: DR.FAUST | Hits:

[SCM] evm9200-sch

Description: Development set EVM9200, based on AT91RM9200 from Atmel Corporation contain popular interfaces Ethernet 100/10, RS232, USB device, USB host, MultimediaCard, and can be useful for embedded systems developers. Development set EVM9200m, EVM9200m analog, buffered external data bus is available for order as physical samples and as via PCB files. Developmet set EVM9200b EVM9200m analog without PHY Externet, MII interface conected to external connector is available for order via PCB files. Project from www.ucrouter.com
Platform: | Size: 889856 | Author: vdpr2 | Hits:

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