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[Other resourcefftverilog

Description: 关于FFT实现的Verilog代码,
Platform: | Size: 410853 | Author: 桑吉 | Hits:

[Other resourceFFT_ip_veriolg_code

Description: ip核的FFTverilog源代码,说明不是很具体
Platform: | Size: 35159 | Author: james_chan | Hits:

[VHDL-FPGA-Verilog512点FFTVerilog实现

Description: 关于FFT Verilog代码实现的源代码
Platform: | Size: 13030773 | Author: happyhongt@163.com | Hits:

[VHDL-FPGA-Verilogfftverilog

Description: 关于FFT实现的Verilog代码,-FFT realize on the Verilog code,
Platform: | Size: 410624 | Author: | Hits:

[VHDL-FPGA-VerilogFFT_ip_veriolg_code

Description: ip核的FFTverilog源代码,说明不是很具体-ip nuclear FFTverilog source code, that is not very specific
Platform: | Size: 34816 | Author: james_chan | Hits:

[assembly languagefftverilog

Description: verilog写的 fft 程序 大家 下载吧 希望能够喜欢-fft write verilog program we hope to be able to download it like Ha, ha, ha
Platform: | Size: 14556160 | Author: 张震 | Hits:

[VHDL-FPGA-VerilogFFTverilog

Description: 快速傅立叶变换FFT的verilog实现详解.pdf-Detailed FFT-verilog implementation. Pdf
Platform: | Size: 704512 | Author: 左会刚 | Hits:

[Otherfftverilog

Description: 用verilog 写的fft计算的程序,可以作为参考-Use verilog write FFT calculation procedures, can be used as a reference
Platform: | Size: 24576 | Author: 蔡金峰 | Hits:

[VHDL-FPGA-Verilogfft_8

Description: 基二8点fftverilog实现。经过modelsim仿真通过-Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation
Platform: | Size: 48128 | Author: 王坤 | Hits:

[AlgorithmFFT

Description: 对比fftverilog实现一个8阶的改进串行FIR低通滤波器,输入数据位宽为12比特,经符号扩展-Comparison of fftverilog order to achieve an improvement of 8 serial FIR low pass filter, the input data width is 12 bits, sign extended
Platform: | Size: 24576 | Author: Hades | Hits:

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