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[VHDL-FPGA-Verilog] firmatlab

Description: fir在dspbuilder下产生VHDL源码及其测试激励文件时的matlab模型,在modelsim下仿真通过-fir in dspbuilder VHDL source code under test and document the incentive mat lab model, the simulation under through modelsim
Platform: | Size: 6144 | Author: zqh | Hits:

[matlab] vhdl_fir

Description: 在matlab仿真的基础上，用maxplus2实现等波纹法的程序代码-In matlab simulation, based on the use of such corrugated maxplus2 realize law code
Platform: | Size: 5120 | Author: 王娟芳 | Hits:

[VHDL-FPGA-Verilog] fir_using_FPGA

Description: 基于verilog的fir滤波，并带matlab仿真-Verilog-based filtering of fir and bring matlab simulation
Platform: | Size: 24576 | Author: 宇天 | Hits:

[VHDL-FPGA-Verilog] VHDLFIR

Description: VHDL设计FIR滤波器 基于QUARTUS和MATLAB-VHDL design of FIR filter based on Quartus and MATLAB
Platform: | Size: 1032192 | Author: twinslizzy | Hits:

[VHDL-FPGA-Verilog] FIR_TEST

Description: 应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块，并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we design such core modules as CIC filter, HB filter and FIR filter of the digital down converter.
Platform: | Size: 182272 | Author: 邓建良 | Hits:

[VHDL-FPGA-Verilog] 1

Description: FIR的FPGA实现及其Quartus Ⅱ与MATLAB仿真 FIR的FPGA实现及其Quartus Ⅱ与MATLAB仿真-The FPGA realization of FIR and its Quartus Ⅱ and MATLAB simulation FIR realization of the FPGA and Quartus Ⅱ and MATLAB simulation
Platform: | Size: 175104 | Author: 南才北往 | Hits:

[VHDL-FPGA-Verilog] fir_hdl

Description: 一个 FIR 滤波器的 verilog 实现， 与 matlab 产生的 reference code 相互验证。-Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication.
Platform: | Size: 97280 | Author: wei | Hits:

[VHDL-FPGA-Verilog] reload_fir

Description: 这是我在Xilinx公司的FPGA上实现的FIR滤波器，调用的内部核，其特色是可以用较少的资源实现该功能，而且可以实现参数重载，即从外部MCU设置FIR滤波器的参数-This is my Xilinx FPGA to achieve the FIR filter, called internal audit, its characteristics can be achieved with fewer resources to this function, and the overload parameters can be achieved, that is, from an external MCU to set the parameters of FIR Filter
Platform: | Size: 16727040 | Author: 林寒风 | Hits:

[DSP program] fir

Description: 先用matlab得到所需滤波器的系数，将AD采样的数据经过fir滤波器后输出-First to use matlab to obtain the required filter coefficients, data from the AD sample, after the output filter through the fir
Platform: | Size: 2262016 | Author: 潘存华 | Hits:

[Mathimatics-Numerical algorithms] fir_filter

Description: 该数字滤波器通过结合matlab和vhdl来实现低通fir数字滤波器功能-The digital filter through a combination of matlab and vhdl to achieve low-pass digital filter function fir
Platform: | Size: 26624 | Author: caoge | Hits:

[Documents] VHDL-FIRfilter

Description: 利用vhdl实现fir低通滤波器的设计，并且使用了MATLAB，很好很强大。-VHDL MATLAB fir lowpass filter
Platform: | Size: 29696 | Author: 邵娜 | Hits:

[VHDL-FPGA-Verilog] firlvboqi

Description: fir滤波器设计，是MATLAB设计的vhdl转换-VHDL fir digital filter design, MATLAB-based design of the conversion
Platform: | Size: 3072 | Author: 赵童 | Hits:

[VHDL-FPGA-Verilog] FIR-filter-using-fpga-design

Description: 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ，QuartusII software
Platform: | Size: 4539392 | Author: 星空心晴之夏 | Hits:

[VHDL-FPGA-Verilog] FIR_128

Description: FIR 128阶低通滤波器，由matlab仿真并在quartusII中实现-FIR 128 order low-pass filter
Platform: | Size: 366592 | Author: 邱柳钦 | Hits:

[VHDL-FPGA-Verilog] fir_PGA

Description: 一种基于verilog的fir滤波源码，并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation.
Platform: | Size: 23552 | Author: 对称 | Hits:

[VHDL-FPGA-Verilog] -VHDL

Description: 本报告分两部分： 1 由matlab计算FIR数字滤波器的滤波系数； 2 用VHDL语言设计逻辑电路，再通过QUARTUS II 软件，将各个模块的电路封装成期间，在顶层设计中通过连线，完成整个系统。 -FIR digital filters based on VHDL
Platform: | Size: 115712 | Author: | Hits:

[Other] filter

Description: 各种模块实现10阶FIR滤波器,用matlab中的fdatool计算出设计的滤波器的系数，再利用VHDL编写各模块程序，实现滤波器-Various modules to achieve the10order filter based on FIR, using MATLAB FDATool calculates the design of the filter coefficients, then use VHDL to prepare procedures for each module, the realization of filters
Platform: | Size: 289792 | Author: 刘定超 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: fir数字滤波器，VHDL语言编程，先通过MATLAB计算得到参数。-fir digital filter VHDL language programming, first obtained by MATLAB calculated parameters.
Platform: | Size: 946176 | Author: jinhong | Hits:

[VHDL-FPGA-Verilog] myfir

Description: VHDL设计的FIR滤波器，有Matlab设计文件，Quartus II工程以及Modelsim仿真结果和说明文件-VHDL design FIR filters, Matlab design documents, Quartus II project and Modelsim simulation results and documentation
Platform: | Size: 2861056 | Author: fangying | Hits:

[Other] E4_6_FirIpCore

Description: 用vhdl语言在xilinx上用ip核实现的fir滤波器的设计(Design of FIR filter implemented with IP kernel on Xilinx in VHDL language)
Platform: | Size: 1198080 | Author: cc12 | Hits:
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