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[VHDL-FPGA-Veriloghalfband

Description: verilog写的39阶通带为20KHz的半带fir滤波器,经测试正确。-verilog halfband FIR
Platform: | Size: 1024 | Author: lv | Hits:

[DSP programhalfband_1

Description: remez算法设计半带FIR滤波器,对半带滤波器,通带和阻带权值惩罚函数要相等-remez algorithm design half-band FIR filter
Platform: | Size: 1024 | Author: suzhou | Hits:

[Software Engineeringjifenlvboqi

Description: 为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术.多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器.在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过Quartus Ⅱ的时序仿真分析得以验证,实际中可以推广应用.-In order to solve software-defined radio communications system after IF sampling of great amount of data to the DSP in the baseband processor part of the calculation of the pressure, often using multi-rate processing technology. Multi-rate processing need to use the integrator comb filter, half-band filters and high-order FIR filter. in the analysis of the integrator comb filter structure and characteristics, based on the multi-stage CIC filter described an efficient FPGA implementations, the correctness and feasibility of the method adopted by the timing Quartus Ⅱ simulation analysis can be verified in practice can be applied.
Platform: | Size: 180224 | Author: 王楚宏 | Hits:

[DSP programAM

Description: FIRPM公园,麦克莱伦最佳equiripple FIR滤波器的设计。乙= FIRPM(不适用,女,甲)返回一个长度为N +1线性相位(真实,对称系数)FIR滤波器具有最佳逼近到所需的频率响应的F和描述在极小极大意义的。F是成对频带边缘载体,以递增0和1之间秩序。 1对应于奈奎斯特频率或采样频率的一半。至少有一个频段必须有一个非零宽度。 A是一个真正的载体,作为F的指定由此得到的滤波器的频率响应所需的幅度B相同大小- FIRPM Parks-McClellan optimal equiripple FIR filter design. B=FIRPM(N,F,A) returns a length N+1 linear phase (real, symmetric coefficients) FIR filter which has the best approximation to the desired frequency response described by F and A in the minimax sense. F is a vector of frequency band edges in pairs, in ascending order between 0 and 1. 1 corresponds to the Nyquist frequency or half the sampling frequency. At least one frequency band must have a non-zero width. A is a real vector the same size as F which specifies the desired amplitude of the frequency response of the resultant filter B.
Platform: | Size: 1024 | Author: | Hits:

[DSP programdspddc_R12p1

Description: 基于DSPbuilder搭建的DDC,里面包括CIC滤波器,FIR低通滤波器,HB半带滤波器,NCO等,实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
Platform: | Size: 17408 | Author: 郑程 | Hits:

[Communicationhalf_band_cc

Description: 半带滤波器是FIR滤波器的特殊情况,在软件无线电的变速率采样中有着广泛的应用,-Half-band FIR filter filters are special circumstances in the software radio has a variable-rate sampling of a wide range of applications,
Platform: | Size: 285696 | Author: yilingzhu | Hits:

[matlabFIR

Description: 详细介绍了窄带滤波器的设计,如半带,CIC等原理,原理很详细-Details of the narrow-band filter design, such as half-band, CIC and other principles, the principle in detail
Platform: | Size: 656384 | Author: eric | Hits:

[Communication-Mobile16QAm

Description: 采用MATLAB编程,产生一个16QAM基带信号,并进行实数倍插值计算。要求符号率为1 MSymbol/s,采用均方根升余弦滤波成形,滚降系数=0.5。产生{…1,0,1,1,…}的伪随机序列,经过映射、4倍成形滤波、FIR半带滤波、实数倍内插滤波,最后输出4.315倍时域/频域响应。给出信号序列经过各级滤波的时域、频域结果-Using MATLAB programming, resulting in a 16QAM baseband signal, and the real multiples of the interpolation calculation. The requirements of symbol rate 1 MSymbol/s, the root mean square raised cosine filter shape, roll-off factor = 0.5. Generate {1,0,1,1, ...} of the pseudo-random sequence, mapping, four times the shaping filter, FIR half-band filter, in fact, several times interpolation filter, the final output of 4.315 times the time domain/frequency domain response. Given the signal sequence through all levels of filtering the time domain, frequency domain results
Platform: | Size: 239616 | Author: | Hits:

[VHDL-FPGA-VerilogFIR

Description: 级联优化的半带插值滤波器,分模块设计-Half-band interpolation filter cascade optimization sub-module design.
Platform: | Size: 24576 | Author: 陈凯 | Hits:

[VHDL-FPGA-VerilogHalfbandDec

Description: 基于FPGA开发的11阶半带升余弦FIR滤波器,用在阅读器基带滤波时的抽取滤波器使用,采用verilog语言实现。-Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation.
Platform: | Size: 1024 | Author: 小梦 | Hits:

[Audio programdesignHBF

Description: 半带有限冲击响应滤波器算法的matlab程序-half band fir filter algorithm
Platform: | Size: 1024 | Author: jarfld | Hits:

[Communicationbaseband-signal_ofdm

Description: 一个OFDM 基带信号,采用256点IFFT,子载波采用8PSK映射,加保护段,调制信号采用“削顶”方法降低PAPR,FIR 半带滤波,最后输出时域信号/频域响应。包含各级的视频域比较-An OFDM baseband signal, using the 256-point IFFT, the sub-carrier using 8PSK mapping, plus the protection section, the modulated signal " cut top" approach reduces a PAPR FIR half-band filter, the final output signal of the time domain/frequency domain response. Contains all levels of the video domain comparison
Platform: | Size: 2048 | Author: | Hits:

[VHDL-FPGA-VerilogMultHalfBand

Description: 多级半带滤波器的FPGA实现,采用6级滤波器实现的采样频率由3200Hz降为50Hz的抽取系统,前5级为半带滤波器,最后一级为普通FIR滤波器-Multi-level half-band filter FPGA, using six filters for sampling frequencies 50Hz down to 3200Hz extraction system for the front five and a half-band filter, the last stage of the ordinary FIR filter
Platform: | Size: 1508352 | Author: xuweiwei | Hits:

[Otherddc

Description: 接收机中ddc的实现,包含CIC、半带和FIR滤波-DDC implementation in the receiver, including CIC, half band and FIR filter
Platform: | Size: 3072 | Author: 李青华 | Hits:

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