Search - FPGA控制SDRAM

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[Other resource] EvsStore DL : 0: 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
Update : 2008-10-13 Size : 924byte Publisher : 杨承凯
[Other resource] T4_sdram_control DL : 0: verilog语言利用FPGA控制SDRAM，相信很多朋友都需要快下载吧
Update : 2008-10-13 Size : 19.3kb Publisher : 杜菲
[Other Embeded program] 通用SDRAM编程核心资料代码 DL : 1: 通用于FPGA控制SDRAM编程核心资料代码，给出了验证实用的 Velogic代码。有很高的实用价值！
Update : 2012-04-02 Size : 729.09kb Publisher : epudn2012
[VHDL-FPGA-Verilog] Verilog&Vhdl混语言对SDRAM的控制源代码 DL : 0: Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
Update : 2025-02-17 Size : 244kb Publisher : 飞扬
[VHDL-FPGA-Verilog] EvsStore DL : 0: 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
Update : 2025-02-17 Size : 1kb Publisher :
[VHDL-FPGA-Verilog] sdram_control DL : 0: 这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱：wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com
Update : 2025-02-17 Size : 332kb Publisher : 李伟
[File Format] designforvideobasedonSDRAM DL : 0: 在信息处理中，特别是实时视频图像处理中，通常都要对实现视频图像进行处理，而这首先必须设计大容量的存储器，同步动态随机存储器SDRAM虽然有价格低廉、容量大等优点，但因SDRAM的控制结构复杂，常用的方法是设计SDRAM通用控制器，这使得很多人不得不放弃使用SDRAM而使用价格昂贵的SRAM。为此，笔者在研究有关文献的基础上，根据具体情况提出一种独特的方法，实现了对SDRAM的控制，并通过利用FPGA控制数据存取的顺序来实现对数字视频图像的旋转，截取、平移等实时处理。-In information processing, especially real-time video image processing usually have to deal with video images, which must first be designed large-capacity memory, synchronous dynamic random access memory SDRAM Although there are low cost, large capacity, etc., but SDRAM control structure of the complex, commonly used method is to design generic SDRAM controller, which makes a lot of people had to abandon the use of SDRAM and the use of expensive SRAM. To this end, the authors examine the literature based on the specific situation in a unique way to realize the control of SDRAM, and control data through the use of FPGA to realize the order of access to digital video image rotation, interception, translation, such as real-time processing.
Update : 2025-02-17 Size : 134kb Publisher : 赵明玺
[MPI] sdram_verilog_lattice DL : 0: 已经成功的FPGA 控制的SDRAM控制器代码.只要修改你需要的宽度就可以了.-FPGA has been successfully controlled by SDRAM controller code. As long as you need to modify the width of it.
Update : 2025-02-17 Size : 183kb Publisher : chen qiming
[Program doc] FPGA DL : 0: SDRAM控制模块；图象采集系统说明性稳当；DSP图象采集系统。SDRAM作为存储器。-SDRAM control module image acquisition system illustrative trustworthy DSP image acquisition system. SDRAM as the memory.
Update : 2025-02-17 Size : 175kb Publisher : yan
[Graph program] VGA DL : 0: 利用fpga控制VGA显示，很实用的，对于初学FPGA的同志，有帮助。-FPGA to control the use of VGA display, it is useful for the beginner FPGA comrades, helpful.
Update : 2025-02-17 Size : 428kb Publisher : 杜菲
[VHDL-FPGA-Verilog] T4_sdram_control DL : 0: verilog语言利用FPGA控制SDRAM，相信很多朋友都需要快下载吧-control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
Update : 2025-02-17 Size : 19kb Publisher : 杜菲
[Software Engineering] FPGA_SDR_Sdram_LED DL : 0: 针对主控制板上存储器(SRAM) 存储的数据量小和最高频率低的情况,提出了基于SDR Sdram(同步动态RAM) 作为主存储器的LED 显示系统的研究。在实验中,使用了现场可编程门阵列( FPGA) 来实现各模块的逻辑功能。最终实现了对L ED 显示屏的控制,并且一块主控制板最大限度的控制了256 ×128 个像素点,基于相同条件,比静态内存控制的面积大了一倍,验证了动态内存核[7 ]的实用性。-For the main control board memory (SRAM) a small amount of stored data and the highest frequency of low, based on SDR Sdram (Synchronous Dynamic RAM) as the main memory of the LED display systems. In the experiment, the use of field programmable gate array (FPGA) to realize the logic function of each module. The eventual realization of L ED display control, and a master control panel to maximize the control of the 256 × 128 pixels point, based on the same conditions than the static memory control area has doubled, to verify the dynamic memory of nuclear [7 ] the practicality.
Update : 2025-02-17 Size : 499kb Publisher : 郑宏超
[VHDL-FPGA-Verilog] SDRAM DL : 0: 这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
Update : 2025-02-17 Size : 2.07mb Publisher : jyb
[VHDL-FPGA-Verilog] SDRAM_VerilogCode DL : 0: 基于FPGA的SDRAM控制器Verilog代码，开发环境为Quartus6.1，控制SDRAM实现对同一片地址先写后读。-FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to write.
Update : 2025-02-17 Size : 26kb Publisher : 姜琰俊
[VHDL-FPGA-Verilog] webCam-FPGA DL : 0: 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
Update : 2025-02-17 Size : 36kb Publisher : NOOW
[VHDL-FPGA-Verilog] SDRAM_CTR DL : 0: vhdl语言编写的fpga控制sdram的程序，包括仿真结果.-program of vhdl to control sdram in which includes the simulating results
Update : 2025-02-17 Size : 316kb Publisher : lmy
[Other] sdram_normal DL : 0: sdram控制器，用于fpga中的sdram读写和刷新控制-sdram controler in FPGA
Update : 2025-02-17 Size : 2kb Publisher : mingleicui
[VHDL-FPGA-Verilog] FPGA-SDRAM-control-code DL : 0: 该程序是FPGA控制DDR SRAM的控制源代码，使得SDRAM的控制变得简单。-This program is DDR SDRAM control code ,it makes the operation of SDRAM more easy.
Update : 2025-02-17 Size : 41kb Publisher : didi
[VHDL-FPGA-Verilog] sdram_hr_hw_4port DL : 1: FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
Update : 2025-02-17 Size : 2.23mb Publisher : 刘成岩
[Technology Management] SDRAM-dataset DL : 0: SDRAM详细资料集，还有FPGA控制SDRAM的读写实例，对于想要深入研究FPGA的朋友非常有帮助-SDRAM detailed data sets, as well as examples of FPGA control SDRAM read and write, who want in-depth study on FPGA friends very helpful! !
Update : 2025-02-17 Size : 22.55mb Publisher : 刘云

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