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[VHDL-FPGA-Verilogpci_vhdl

Description: PCI的VHDL源码希望对大家有用!-PCI VHDL source hope useful for all!
Platform: | Size: 27648 | Author: 林建加 | Hits:

[VHDL-FPGA-Verilogpci 的vhdl 源代码

Description: pci 的vhdl 源代码-The source code of PCI VHDL.
Platform: | Size: 3072 | Author: 陈旭 | Hits:

[OtherPCI_Target_ip

Description: pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
Platform: | Size: 428032 | Author: zhouhong | Hits:

[Embeded-SCM Developfpgapci

Description: 用vhdl编写的pci源代码。花了我2000多元钱买来的,编译通过!-with vhdl pci prepared by the source code. I spent more than 2,000 yuan to buy and compile!
Platform: | Size: 3072 | Author: 王娟 | Hits:

[Embeded-SCM DevelopPCI

Description: PCI局部总线的中文教程,可以加快你对PCI总线通讯协议的学习理解。-PCI Local Bus Guide in Chinese, you can speed up your PCI bus communication protocol of the study and understanding.
Platform: | Size: 1171456 | Author: 何风 | Hits:

[VHDL-FPGA-Verilogpci144_vhdl

Description: PCI vhdl for Fpga designer to design PCI IP
Platform: | Size: 3072 | Author: 李晓媛 | Hits:

[VHDL-FPGA-VerilogPcit32vhdl

Description: PCI 32 target IP for Fpga/asic Designer
Platform: | Size: 428032 | Author: 李晓媛 | Hits:

[VHDL-FPGA-Verilogpci_express_crc

Description: PCI express CRC rtl core for Fpga/asic Designer
Platform: | Size: 202752 | Author: 李晓媛 | Hits:

[OtherPCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Platform: | Size: 899072 | Author: lee | Hits:

[VHDL-FPGA-Verilogpci_core

Description: pci CORES 从外国网站上弄下来的,大家可以看看啊-pci CORES from foreign web sites get down, we will look at ah
Platform: | Size: 28672 | Author: haitao | Hits:

[VHDL-FPGA-Verilogpci9030

Description: pci9030接口,可以实现与pci9030芯片的接口,-pci9030 interface can be achieved with pci9030 chip interface,
Platform: | Size: 1024 | Author: jz | Hits:

[File Formatasic_design

Description: 华为,大规模逻辑设计指导书,规格详细,包括:VHDL编写规范,Verilog编写规范,asic设计方法,同步电路设计规则,vhdl电路设计,代码可重用设计,-Huawei, a large-scale logic design guide books, detailed specifications, including: VHDL specification preparation, Verilog specification preparation, asic design, synchronous circuit design rules, vhdl circuit design, reusable code design,
Platform: | Size: 2041856 | Author: feng jee | Hits:

[VHDL-FPGA-VerilogPCI-IPcoreor1k[1]

Description: PCI的ip core,VHDL代码,希望对大家有帮助-PCI-ip core, VHDL code, we hope to help
Platform: | Size: 1064960 | Author: 李明 | Hits:

[Embeded-SCM DevelopFPGA-PCI

Description: 基于FPGA的PCI接口源代码及Testbench Verilog程序代码-fpag pci
Platform: | Size: 467968 | Author: lang | Hits:

[VHDL-FPGA-VerilogVerilog-pci

Description: PCI的FPGA实现,使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
Platform: | Size: 5510144 | Author: zxc | Hits:

[VHDL-FPGA-Verilogpci

Description: pci总线源代码,总线设计参考。适合于飓风系列FPGA设计参考。-pci bus source code, the bus design. For hurricane series FPGA design.
Platform: | Size: 23552 | Author: Zeng.q | Hits:

[VHDL-FPGA-Verilogpci_steuerung_target

Description: vhdl code for card pci to fpga
Platform: | Size: 7168 | Author: sina | Hits:

[VHDL-FPGA-Verilogpci_steuerung_master

Description: vhdl code for card pci to fpga
Platform: | Size: 4096 | Author: sina | Hits:

[VHDL-FPGA-Verilogfpga_A

Description: vhdl code for card pci to fpga
Platform: | Size: 3072 | Author: sina | Hits:

[VHDL-FPGA-VerilogRED--PCI-5.0

Description: 使用PCI9054作为接口芯片,通过FPGA实现PCI9054,SDRAM和AD之间的连接,本程序是以此为目的编写的.-PCI9054 interface chip used as a through FPGA implementation PCI9054, SDRAM, and the connection between AD, the program is prepared for this purpose.
Platform: | Size: 3389440 | Author: 黄宸懿 | Hits:
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