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[Embeded-SCM Develop] Ethdev_bsp

Description: 此文档为采用FPGA实现的以太网MAC层，以及嵌入式的TCP/IP协议栈-this document for the introduction of FPGA Ethernet MAC layer, as well as embedded TCP/IP protocol stack
Platform: | Size: 1200128 | Author: 刘荣鑫 | Hits:

[Compress-Decompress algrithms] rs_encoder

Description: 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。-A very good RS encoder for DVB Channel Coding using VHDL language, in the FPGA-validated.
Platform: | Size: 3072 | Author: 杨宇 | Hits:

[VHDL-FPGA-Verilog] 76_PID

Description: 一个非常好的电机转速控制器VHDL源代码设计-A very good motor speed controller VHDL design source code
Platform: | Size: 2048 | Author: linew | Hits:

[ELanguage] lpl

Description: 用于数字下变频器的 FPGA 实现 -Digital Down Converter for the FPGA to achieve
Platform: | Size: 2790400 | Author: camilla | Hits:

[Streaming Mpeg4] Channel_coding_of_dvb-t_system

Description: DVB_T系统中信道编码的研究与FPGA实现，一篇很好的说是论文，caj阅读器浏览- Research and FPGA Implementation of Channel Coding in DVB-T Systems
Platform: | Size: 1945600 | Author: bai | Hits:

[Mathimatics-Numerical algorithms] T-CAS

Description: Efficient FIR Filter Architectures Suitable for FPGA Implementation Joseph B. Evans Telecommunications & Information Sciences Laboratory
Platform: | Size: 43008 | Author: btttnn | Hits:

[VHDL-FPGA-Verilog] TFT

Description: 基于FPGA的实验。使用FPGA直接控制TFT彩屏，达到显示彩条的效果。使用FPGA连接TFT控制器，使显示一组汉字或一幅图像。 -FPGA-based experiment. FPGA to directly control the use of TFT color display to show the effect of color. TFT controller using FPGA connected to a group of Chinese characters displayed or an image.
Platform: | Size: 1024 | Author: 贺欧 | Hits:

[Streaming Mpeg4] DVBT_TRANSMITER_SYSTEM_IMPLEMENTED_ON_FPGA

Description: 介绍DVB-T的发射通道设计，使用FPGA来实现COFDM调制。-DVBT TRANSMITER SYSTEM IMPLEMENTED ON FPGA
Platform: | Size: 135168 | Author: 老刘 | Hits:

[VHDL-FPGA-Verilog] fpga_tcl

Description: Altera FPGA的特殊管脚的连接(中文).doc TCL_教程.pdf-Altera FPGA tcl
Platform: | Size: 629760 | Author: 朱柏 | Hits:

[Other] DVB-H--code-and-fpga

Description: DVB_H信道编码调制的设计及其FPGA实现研究，供大家学习参考。-DVB_H channel coding modulation design and FPGA Realization for them to learn information.
Platform: | Size: 2475008 | Author: 颜琳 | Hits:

[VHDL-FPGA-Verilog] EP1C3

Description: fpga LCD 最小系统开发板原理图还内存与SRAM-fpga LCD development board schematics minimum system memory and SRAM is also
Platform: | Size: 139264 | Author: bisedeng | Hits:

[Program doc] DVB

Description: DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
Platform: | Size: 708608 | Author: 程钢 | Hits:

[Software Engineering] plugin-tut_timing_verilog_Lab2

Description: manual for time analysis and testing the critical path in verilog FPGA using Accumulator design
Platform: | Size: 389120 | Author: ahmed | Hits:

[VHDL-FPGA-Verilog] deinterleave

Description: CDMA.1X中，解交织的FPGA实现，程序基于VHDL编写，在XILINX开发板实现。-CDMA.1X, the solution of interwoven FPGA implementation, the program prepared based on VHDL, in the XILINX development board to achieve.
Platform: | Size: 268288 | Author: 蔡蔡 | Hits:

[VHDL-FPGA-Verilog] MLP-network-prior-t-th-FPGA-implementation

Description: 前向MLP网络的FPGA实现MLP network prior to the FPGA implementation-MLP network prior to the FPGA implementation
Platform: | Size: 83968 | Author: soos1001 | Hits:

[VHDL-FPGA-Verilog] Copy-of-Systolic-Architecture-to-convert-colour-t

Description: the paper presents efficient colour conversion algorithm for fpga implementations
Platform: | Size: 294912 | Author: arun scaria | Hits:

[VHDL-FPGA-Verilog] FPGA_TFT

Description: 使用FPGA驱动TFT液晶实现显示，开发环境为ALTERA公司的软件-Driven by the FPGA TFT LCD display, the software development environment for ALTERA
Platform: | Size: 110592 | Author: 宋珂 | Hits:

[VHDL-FPGA-Verilog] T

Description: T触发器 T触发器VHDL实现及报告 FPGA-T flip-flop VHDL implementation and reporting.
Platform: | Size: 36864 | Author: 刘银龙 | Hits:

[Other] 用FPGA实现ATM信元的字头处理_邹扬真

Description: 本文探讨了采用F P G A X 3 0 0 o 系列芯片实现独立于承载码流结构的A T M 信元字头处理 器的可能性. 针对F P G A 处理速度相对低于可能的承载码流速率的问题. 着重研究了字头H E C 字 段生成 、 扰码、信元定界 、 解扰等过程的并行处理算法
Platform: | Size: 422681 | Author: shandongtou | Hits:

[VHDL-FPGA-Verilog] 基于FPGA的多路同步脉冲发生器设计1

Description: 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
Platform: | Size: 10240 | Author: 哈哈哈哈daxiao | Hits:
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