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Description: 基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。
在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
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Size: 14336 |
Author: 李浩 |
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Description: actel A3P250 fpga用VERILOG HDL语言实现串口功能的源代码-actel A3P250 fpga with VERILOG HDL Serial functional language source code
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Size: 533504 |
Author: wuqj |
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Description: 异步通信串行口设计实例，很实用。比较经典。-Asynchronous serial port communications design example, it is practical. Comparison of the classic.
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Size: 493568 |
Author: 王网 |
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Description: 利用FPGA实现串口通信，很好的学习资料
尤其是对 verilog不熟的朋友-FPGA realization of the use of serial communications, a very good learning materials especially in the wake of a friend Verilog
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Size: 468992 |
Author: 杜菲 |
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Description: 微程序控制电路是CPU 控制器的核心电路，控制产生指令执行时各部件协调工作所需的所有控制信号，以及下一条指令的地址。微程序控制器的组成如图6-12 所示，主要由三个部分组成，分别是微指令控制电路、微地址寄存器和微指令存储器lpm_rom 其中微指令控制电路用组合电路对指令中的1[7..2] 、操作台控制信号SWA 和SWB 的状态、状态寄存器的输出状态FC 、FZ ，产生微地址变化的控制信号，实现对微地址控制:微地址寄存器控制电路的基本输入信号是微指令存储器的下地址字段M[6..1] ，同时还受微指令控制电路的输出信号SE[6..1]和复位信号RST 的控制，输出下一个微指令的地址:控制存储器由FPGA 中的LPM ROM 构成，输出24 位控制信号。在24 位控制信号中，微命令信号为18 位，微地址信号豆位。在口时刻将打入微地址寄存器UA 的内容，即为下一条微指令地址.当T4时刻进行测试判别时，转移逻辑满足条件后输出的负脉冲，通过强制端将某一触发器置为"1"状态，完成地址修改。微程序控制器中的微控制代码可以通过对FPGA 中LPMß OM 的配置进行输入，通过编辑LPM ROM.mif 文件来修改微控制代码。详细情况可参考LPIÞ CROM的配置方法。微指令控制电路内部结构如图6-2 ， 6-3. 6-13 所示-Micro-program control circuit is the core CPU controller circuit, the control instruction execution produces the coordination of all parts of all the necessary control signals, and the next instruction address. The composition of micro-program controller shown in Figure 6-12, the main three components, namely, microinstruction control circuit, micro-address register and the microcode memory lpm_rom microcode control circuit which combination circuit with instruction in the 1 [ 7 .. 2], SWA and SWB console control signal state, the state register output state FC, FZ, produce changes in micro-address control signals, to realize the micro-address control: micro-address register control circuit input signal is the basic micro- The next address field instruction memory M [6 .. 1], but also by the microcode control circuit output signal SE [6 .. 1] and reset control signal RST, the output of the next microinstruction address: control memory by the FPGA in the LPM ROM form, the output 24-bit
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Size: 2584576 |
Author: 623902748 |
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